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| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2017-03-02 23:42:39 +0100 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-03-08 09:52:55 +0100 |
| commit | 23988bab04575261c74743b2828d624946cd3b57 (patch) | |
| tree | be41ce7d384ddf8c7ea6beff963b21eaad1aac2e /.cocciconfig | |
| parent | ARM: dts: mvebu: Move mv98dx3236 clock bindings (diff) | |
| download | linux-23988bab04575261c74743b2828d624946cd3b57.tar.xz linux-23988bab04575261c74743b2828d624946cd3b57.zip | |
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to '.cocciconfig')
0 files changed, 0 insertions, 0 deletions