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authorBjorn Helgaas <bhelgaas@google.com>2019-10-08 22:28:00 +0200
committerBjorn Helgaas <bhelgaas@google.com>2019-11-21 00:33:46 +0100
commit85a9b0507db2fbbfe7912dc3b33d322f200e2ca7 (patch)
tree31cec9768bc0e39466f2c7bd7d5e96815f2c12d9 /.get_maintainer.ignore
parentPCI/PM: Make power management op coding style consistent (diff)
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PCI/PM: Note that PME can be generated from D0
Per PCIe r5.0 sec 7.5.2.1, PME may be generated from D0, so update Documentation/power/pci.rst to reflect that. Link: https://lore.kernel.org/r/20191016194450.68959-1-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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