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authorMax Filippov <jcmvbkbc@gmail.com>2018-12-05 21:48:19 +0100
committerMax Filippov <jcmvbkbc@gmail.com>2018-12-05 21:53:07 +0100
commit037602705109ec2ab96340bea93ad87daa3ac046 (patch)
tree616c10e2e60b8a6bfbe388366ea1c1c3f170dafb /.get_maintainer.ignore
parentxtensa: xtfpga.dtsi: fix dtc warnings about SPI (diff)
downloadlinux-037602705109ec2ab96340bea93ad87daa3ac046.tar.xz
linux-037602705109ec2ab96340bea93ad87daa3ac046.zip
xtensa: don't use l32r opcode directly
xtensa assembler is capable of representing register loads with either movi + addmi, l32r or const16, depending on the core configuration. Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let the assembler relax them. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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