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author | Dale Farnsworth <dale@farnsworth.org> | 2007-05-12 02:55:24 +0200 |
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committer | Paul Mackerras <paulus@samba.org> | 2007-05-12 03:32:49 +0200 |
commit | e44b8941908ec9ccf03b52713c9e7d3471bada8c (patch) | |
tree | 750f6cf76959a64592223b32d11883bb04b8aba1 /.mailmap | |
parent | [POWERPC] Add bootwrapper support for Marvell/mv64x60 I2C (diff) | |
download | linux-e44b8941908ec9ccf03b52713c9e7d3471bada8c.tar.xz linux-e44b8941908ec9ccf03b52713c9e7d3471bada8c.zip |
[POWERPC] Add interrupt support for Marvell mv64x60 chips
There are 3 interrupt groups each with its own status/mask registers.
We use a separate struct irq_chip for each interrupt group and handle
interrupts in two stages or levels: level 1 selects the appropriate
struct irq_chip, and level 2 selects individual interrupts within
that irq_chip.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions