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| author | Will Deacon <will@kernel.org> | 2020-04-14 23:40:09 +0200 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-05-14 00:32:00 +0200 |
| commit | 8e958839e4b9fb6ea4385ff2c52d1333a3a618de (patch) | |
| tree | 487521d3d5161f12c348a62d97b35201e0131f28 /.mailmap | |
| parent | sparc32: mm: Fix argument checking in __srmmu_get_nocache() (diff) | |
| download | linux-8e958839e4b9fb6ea4385ff2c52d1333a3a618de.tar.xz linux-8e958839e4b9fb6ea4385ff2c52d1333a3a618de.zip | |
sparc32: mm: Restructure sparc32 MMU page-table layout
The "SRMMU" supports 4k pages using a fixed three-level walk with a
256-entry PGD and 64-entry PMD/PTE levels. In order to fill a page
with a 'pgtable_t', the SRMMU code allocates four native PTE tables
into a single PTE allocation and similarly for the PMD level, leading
to an array of 16 physical pointers in a 'pmd_t'
This breaks the generic code which assumes READ_ONCE(*pmd) will be
word sized.
In a manner similar to ef22d8abd876 ("m68k: mm: Restructure Motorola
MMU page-table layout"), this patch implements the native page-table
setup directly. This significantly increases the page-table memory
overhead, but will be addresses in a subsequent patch.
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions