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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2007-12-09 13:19:36 +0100
committerRalf Baechle <ralf@linux-mips.org>2008-01-29 11:15:00 +0100
commitc9662341f8a09cffd7234a89cc066c342fe343bf (patch)
tree09cace456902e8e61bb04c259863ee231d6336cc
parent[MIPS] Altas, Malta: Switch boot file format to raw. (diff)
downloadlinux-c9662341f8a09cffd7234a89cc066c342fe343bf.tar.xz
linux-c9662341f8a09cffd7234a89cc066c342fe343bf.zip
[MIPS] time: remove unused mips_timer_state()
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to '')
-rw-r--r--arch/mips/dec/time.c1
-rw-r--r--arch/mips/kernel/time.c2
-rw-r--r--include/asm-mips/time.h9
3 files changed, 1 insertions, 11 deletions
diff --git a/arch/mips/dec/time.c b/arch/mips/dec/time.c
index 820e5331205f..60349062595a 100644
--- a/arch/mips/dec/time.c
+++ b/arch/mips/dec/time.c
@@ -161,7 +161,6 @@ static cycle_t dec_ioasic_hpt_read(void)
void __init plat_time_init(void)
{
- mips_timer_state = dec_timer_state;
mips_timer_ack = dec_timer_ack;
if (!cpu_has_counter && IOASIC)
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 2995be1ab3ca..9f85d4cecc5b 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -50,8 +50,6 @@ int update_persistent_clock(struct timespec now)
return rtc_mips_set_mmss(now.tv_sec);
}
-int (*mips_timer_state)(void);
-
int null_perf_irq(void)
{
return 0;
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 7717934f94c3..a8fd16e1981f 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -31,20 +31,13 @@ extern int rtc_mips_set_time(unsigned long);
extern int rtc_mips_set_mmss(unsigned long);
/*
- * Timer interrupt functions.
- * mips_timer_state is needed for high precision timer calibration.
- */
-extern int (*mips_timer_state)(void);
-
-/*
* board specific routines required by time_init().
*/
extern void plat_time_init(void);
/*
* mips_hpt_frequency - must be set if you intend to use an R4k-compatible
- * counter as a timer interrupt source; otherwise it can be set up
- * automagically with an aid of mips_timer_state.
+ * counter as a timer interrupt source.
*/
extern unsigned int mips_hpt_frequency;