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authorDeepak Saxena <dsaxena@plexity.net>2005-10-14 13:49:15 +0200
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-10-14 13:49:15 +0200
commitcb90d681ae439e525de9de519508ac9041342321 (patch)
treefb4ad4931318154171cc32e50b631ecb016ba641
parent[ARM] 3009/1: S3C2410 - io.h offsets too large for LDRH/STRH (diff)
downloadlinux-cb90d681ae439e525de9de519508ac9041342321.tar.xz
linux-cb90d681ae439e525de9de519508ac9041342321.zip
[ARM] 2980/1: Fix L7200 core.c compile
Patch from Deepak Saxena This patch fixes L7200 so that it builds in 2.6.latest. I do not have the hardware so don't know if it actually still works, but the changes are fairly trivial. I am not even sure if anyone still maintains, uses, or cares about this machine type. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-l7200/core.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/mach-l7200/core.c b/arch/arm/mach-l7200/core.c
index 5fd8c9f97f9a..03ed742ae2be 100644
--- a/arch/arm/mach-l7200/core.c
+++ b/arch/arm/mach-l7200/core.c
@@ -7,11 +7,17 @@
*/
#include <linux/kernel.h>
#include <linux/init.h>
+#include <linux/device.h>
+#include <asm/types.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
#include <asm/hardware.h>
#include <asm/page.h>
+#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
/*
* IRQ base register
@@ -47,6 +53,12 @@ static void l7200_unmask_irq(unsigned int irq)
{
IRQ_ENABLE = 1 << irq;
}
+
+static struct irqchip l7200_irq_chip = {
+ .ack = l7200_mask_irq,
+ .mask = l7200_mask_irq,
+ .unmask = l7200_unmask_irq
+};
static void __init l7200_init_irq(void)
{
@@ -56,11 +68,9 @@ static void __init l7200_init_irq(void)
FIQ_ENABLECLEAR = 0xffffffff; /* clear all fast interrupt enables */
for (irq = 0; irq < NR_IRQS; irq++) {
- irq_desc[irq].valid = 1;
- irq_desc[irq].probe_ok = 1;
- irq_desc[irq].mask_ack = l7200_mask_irq;
- irq_desc[irq].mask = l7200_mask_irq;
- irq_desc[irq].unmask = l7200_unmask_irq;
+ set_irq_chip(irq, &l7200_irq_chip);
+ set_irq_flags(irq, IRQF_VALID);
+ set_irq_handler(irq, do_level_IRQ);
}
init_FIQ();