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authorTuomas Tynkkynen <ttynkkynen@nvidia.com>2013-06-11 12:11:18 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-06-18 01:46:06 +0200
commitd777f98bfa44e5a2748603276e9e9fb6ab999079 (patch)
tree8119f2c7bedcde23d3d17d94db068a713ab20bdf
parentmei: support HBM versioning (diff)
downloadlinux-d777f98bfa44e5a2748603276e9e9fb6ab999079.tar.xz
linux-d777f98bfa44e5a2748603276e9e9fb6ab999079.zip
memory: tegra20-mc: Fix hang in IRQ handler.
In Tegra20 any memory controller interrupt would cause an infinite loop in the IRQ handler. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <thierry.reding@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/memory/tegra20-mc.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c
index 2ca5f2814f4a..0548eeacd573 100644
--- a/drivers/memory/tegra20-mc.c
+++ b/drivers/memory/tegra20-mc.c
@@ -193,8 +193,11 @@ static irqreturn_t tegra20_mc_isr(int irq, void *data)
mask &= stat;
if (!mask)
return IRQ_NONE;
- while ((bit = ffs(mask)) != 0)
+ while ((bit = ffs(mask)) != 0) {
tegra20_mc_decode(mc, bit - 1);
+ mask &= ~BIT(bit - 1);
+ }
+
mc_writel(mc, stat, MC_INTSTATUS);
return IRQ_HANDLED;
}