diff options
| author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2006-11-01 17:47:44 +0100 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2006-12-02 06:11:59 +0100 |
| commit | 070f6ffbb8ed5c398e84f1508752b8fd15b05cf2 (patch) | |
| tree | 54ed16c4c1ab85e166c5245f1fcbdca5693e9c48 | |
| parent | e1000: add mmiowb() for IA64 to sync tail writes (diff) | |
| download | linux-070f6ffbb8ed5c398e84f1508752b8fd15b05cf2.tar.xz linux-070f6ffbb8ed5c398e84f1508752b8fd15b05cf2.zip | |
e1000: fix VR powerdown code
On ich systems during PHY power down to D3, the voltage regulators
were left on.
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
| -rw-r--r-- | drivers/net/e1000/e1000_hw.c | 9 | ||||
| -rw-r--r-- | drivers/net/e1000/e1000_hw.h | 1 |
2 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 29e6f6aba9e2..0e2ccf50d4d7 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c @@ -3942,14 +3942,15 @@ e1000_phy_powerdown_workaround(struct e1000_hw *hw) E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE | E1000_PHY_CTRL_NOND0A_GBE_DISABLE); - /* Write VR power-down enable */ + /* Write VR power-down enable - bits 9:8 should be 10b */ e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data); - e1000_write_phy_reg(hw, IGP3_VR_CTRL, phy_data | - IGP3_VR_CTRL_MODE_SHUT); + phy_data |= (1 << 9); + phy_data &= ~(1 << 8); + e1000_write_phy_reg(hw, IGP3_VR_CTRL, phy_data); /* Read it back and test */ e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data); - if ((phy_data & IGP3_VR_CTRL_MODE_SHUT) || retry) + if (((phy_data & IGP3_VR_CTRL_MODE_MASK) == IGP3_VR_CTRL_MODE_SHUT) || retry) break; /* Issue PHY reset and repeat at most one more time */ diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index b32a0c3cfd10..31bea3215841 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h @@ -3173,6 +3173,7 @@ struct e1000_host_command_info { #define IGP3_VR_CTRL \ PHY_REG(776, 18) /* Voltage regulator control register */ #define IGP3_VR_CTRL_MODE_SHUT 0x0200 /* Enter powerdown, shutdown VRs */ +#define IGP3_VR_CTRL_MODE_MASK 0x0300 /* Shutdown VR Mask */ #define IGP3_CAPABILITY \ PHY_REG(776, 19) /* IGP3 Capability Register */ |