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authorStuart Menefy <stuart.menefy@st.com>2007-11-26 13:32:40 +0100
committerPaul Mundt <lethal@linux-sh.org>2008-01-28 05:18:58 +0100
commiteddeeb32fe303910c58c4e3c27fde4b6f1503350 (patch)
tree4117bc9fdc893ae0cc30c8e47cef717aa41ddd15
parentsh: Provide a 29/32-bit physical hint for bootloaders. (diff)
downloadlinux-eddeeb32fe303910c58c4e3c27fde4b6f1503350.tar.xz
linux-eddeeb32fe303910c58c4e3c27fde4b6f1503350.zip
sh: Invalidate the TLB after applying PMB mappings.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/mm/pmb.c6
-rw-r--r--include/asm-sh/cpu-sh4/mmu_context.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 1d45b82f0a63..b632051d6ce5 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -27,6 +27,7 @@
#include <asm/pgtable.h>
#include <asm/mmu.h>
#include <asm/io.h>
+#include <asm/mmu_context.h>
#define NR_PMB_ENTRIES 16
@@ -329,6 +330,11 @@ static int __init pmb_init(void)
/* PMB.SE and UB[7] */
ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR);
+ /* Flush out the TLB */
+ i = ctrl_inl(MMUCR);
+ i |= MMUCR_TI;
+ ctrl_outl(i, MMUCR);
+
back_to_P1();
return 0;
diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h
index 979acddc0f8e..fdd56e3e3a3b 100644
--- a/include/asm-sh/cpu-sh4/mmu_context.h
+++ b/include/asm-sh/cpu-sh4/mmu_context.h
@@ -22,6 +22,8 @@
#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
#define MMU_PAGE_ASSOC_BIT 0x80
+#define MMUCR_TI (1<<2)
+
#ifdef CONFIG_X2TLB
#define MMUCR_ME (1 << 7)
#else