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| author | Peer Chen <peerchen@gmail.com> | 2007-06-07 12:05:12 +0200 |
|---|---|---|
| committer | Jeff Garzik <jeff@garzik.org> | 2007-06-10 04:40:28 +0200 |
| commit | 0522b2869d89b095bf417c8cc6fa404842e91903 (patch) | |
| tree | f093ef64e435674cc562a6b1e26343689563ded1 | |
| parent | libata: fix hw_sata_spd_limit initialization (diff) | |
| download | linux-0522b2869d89b095bf417c8cc6fa404842e91903.tar.xz linux-0522b2869d89b095bf417c8cc6fa404842e91903.zip | |
ahci: Add MCP73/MCP77 support to AHCI driver
Add the MCP73/MCP77 support to ahci driver.
Signed-off-by: Peer Chen <peerchen@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
| -rw-r--r-- | drivers/ata/ahci.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 7baeaffefe7a..545f330e59a5 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -426,6 +426,30 @@ static const struct pci_device_id ahci_pci_tbl[] = { { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci }, /* MCP67 */ { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci }, /* MCP67 */ { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f3), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f4), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f5), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f6), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f7), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f8), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07f9), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07fa), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x07fb), board_ahci }, /* MCP73 */ + { PCI_VDEVICE(NVIDIA, 0x0ad0), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad1), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad2), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad3), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad4), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad5), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad6), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad7), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad8), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ad9), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0ada), board_ahci }, /* MCP77 */ + { PCI_VDEVICE(NVIDIA, 0x0adb), board_ahci }, /* MCP77 */ /* SiS */ { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */ |