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author | David Woodhouse <David.Woodhouse@intel.com> | 2015-03-25 16:43:39 +0100 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2015-03-25 16:43:39 +0100 |
commit | 4423f5e7d28c26af31df711c5c21eeacfac737b4 (patch) | |
tree | 33843e49a5f2e07a75e92339b8593c53ce71c1d5 | |
parent | iommu/vt-d: Allow RMRR on graphics devices too (diff) | |
download | linux-4423f5e7d28c26af31df711c5c21eeacfac737b4.tar.xz linux-4423f5e7d28c26af31df711c5c21eeacfac737b4.zip |
iommu/vt-d: Add new extended capabilities from v2.3 VT-d specification
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r-- | include/linux/intel-iommu.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index ee24ada20428..796ef9645827 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -115,6 +115,17 @@ static inline void dmar_writeq(void __iomem *addr, u64 val) * Extended Capability Register */ +#define ecap_pss(e) ((e >> 35) & 0x1f) +#define ecap_eafs(e) ((e >> 34) & 0x1) +#define ecap_nwfs(e) ((e >> 33) & 0x1) +#define ecap_srs(e) ((e >> 31) & 0x1) +#define ecap_ers(e) ((e >> 30) & 0x1) +#define ecap_prs(e) ((e >> 29) & 0x1) +#define ecap_pasid(e) ((e >> 28) & 0x1) +#define ecap_dis(e) ((e >> 27) & 0x1) +#define ecap_nest(e) ((e >> 26) & 0x1) +#define ecap_mts(e) ((e >> 25) & 0x1) +#define ecap_ecs(e) ((e >> 24) & 0x1) #define ecap_iotlb_offset(e) ((((e) >> 8) & 0x3ff) * 16) #define ecap_max_iotlb_offset(e) (ecap_iotlb_offset(e) + 16) #define ecap_coherent(e) ((e) & 0x1) @@ -178,6 +189,9 @@ static inline void dmar_writeq(void __iomem *addr, u64 val) #define DMA_GSTS_IRES (((u32)1) << 25) #define DMA_GSTS_CFIS (((u32)1) << 23) +/* DMA_RTADDR_REG */ +#define DMA_RTADDR_RTT (((u64)1) << 11) + /* CCMD_REG */ #define DMA_CCMD_ICC (((u64)1) << 63) #define DMA_CCMD_GLOBAL_INVL (((u64)1) << 61) |