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authorBarry Song <barry.song@analog.com>2010-08-05 17:07:41 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-05 17:14:24 +0200
commit752b957a37ee1cc09fccb39a8bc5843edf32119b (patch)
tree8640f15b201f49348d8c2e1cc0ff668b680c502d
parentmtd: Blackfin NFC: fix typo for read/write delay setup (diff)
downloadlinux-752b957a37ee1cc09fccb39a8bc5843edf32119b.tar.xz
linux-752b957a37ee1cc09fccb39a8bc5843edf32119b.zip
mtd: Blackfin NFC: wait for the ECC reset to finish
When resetting the ECC registers/counters, the bit will automatically clear itself once the reset has actually finished. So make sure we wait for that to occur before doing anything else rather than assuming everything is peachy and proceeding with stale ECC values. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/bf5xx_nand.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index d48cc39afc21..8070ff359a41 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -507,6 +507,8 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd,
*/
bfin_write_NFC_RST(ECC_RST);
SSYNC();
+ while (bfin_read_NFC_RST() & ECC_RST)
+ cpu_relax();
disable_dma(CH_NFC);
clear_dma_irqstat(CH_NFC);