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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-11-20 16:27:40 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-11-21 17:47:09 +0100
commit79935fca3f1259e0a6fe203b55008f84ab8f3087 (patch)
tree34d1c90add43eb0b8f6e996f2565f113f2b3aef3
parentdrm/i915: make DP work on LPT-LP machines (diff)
downloadlinux-79935fca3f1259e0a6fe203b55008f84ab8f3087.tar.xz
linux-79935fca3f1259e0a6fe203b55008f84ab8f3087.zip
drm/i915: don't intel_crt_init if DDI A has 4 lanes
DDI A and E have 4 lanes to share, so if DDI A is using 4 lanes, there's nothing left for DDI E, which means there's no CRT port on the machine. The bit we're checking here is programmed at system boot and it cannot be changed afterwards, so we cannot change the amount of lanes reserved for each DDI port. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2d838766418b..5aba146300d3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4515,6 +4515,7 @@
#define DDI_BUF_EMP_800MV_3_5DB_HSW (8<<24) /* Sel8 */
#define DDI_BUF_EMP_MASK (0xf<<24)
#define DDI_BUF_IS_IDLE (1<<7)
+#define DDI_A_4_LANES (1<<4)
#define DDI_PORT_WIDTH_X1 (0<<1)
#define DDI_PORT_WIDTH_X2 (1<<1)
#define DDI_PORT_WIDTH_X4 (3<<1)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4e303cf7ead6..e233541d4c9f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8267,7 +8267,9 @@ static void intel_setup_outputs(struct drm_device *dev)
I915_WRITE(PFIT_CONTROL, 0);
}
- intel_crt_init(dev);
+ if (!(IS_HASWELL(dev) &&
+ (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)))
+ intel_crt_init(dev);
if (IS_HASWELL(dev)) {
int found;