diff options
author | Yakir Yang <ykk@rock-chips.com> | 2016-02-24 11:08:20 +0100 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2016-02-26 01:52:29 +0100 |
commit | 31b1fed36eb56ae8bd25af42ad1625c4110615eb (patch) | |
tree | e220fda568ab18321b5035ba5d7761bb5ae1f57e | |
parent | clk: rockchip: add id of the tsadc clock found on rk3228 SoCs (diff) | |
download | linux-31b1fed36eb56ae8bd25af42ad1625c4110615eb.tar.xz linux-31b1fed36eb56ae8bd25af42ad1625c4110615eb.zip |
clk: rockchip: add the new clock ids for RK3228 VOP
There are four clocks that vop module would need to operate:
DCLK_VOP, HCLK_VOP, SCLK_VOP, ACLK_VOP,
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | include/dt-bindings/clock/rk3228-cru.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3228-cru.h b/include/dt-bindings/clock/rk3228-cru.h index cd2e06bd6103..9ce3da8b51c3 100644 --- a/include/dt-bindings/clock/rk3228-cru.h +++ b/include/dt-bindings/clock/rk3228-cru.h @@ -50,10 +50,15 @@ #define SCLK_SDMMC_SAMPLE 118 #define SCLK_SDIO_SAMPLE 119 #define SCLK_EMMC_SAMPLE 121 +#define SCLK_VOP 122 + +/* dclk gates */ +#define DCLK_VOP 190 /* aclk gates */ #define ACLK_DMAC 194 #define ACLK_PERI 210 +#define ACLK_VOP 211 /* pclk gates */ #define PCLK_GPIO0 320 @@ -75,6 +80,7 @@ #define PCLK_PERI 363 /* hclk gates */ +#define HCLK_VOP 452 #define HCLK_NANDC 453 #define HCLK_SDMMC 456 #define HCLK_SDIO 457 |