diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-09-04 09:50:21 +0200 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2014-09-15 03:37:45 +0200 |
| commit | 42fb1427443b8a72a3c07efa14d53c63d324cba8 (patch) | |
| tree | 718b8bdb20f7539a6175cb2cda6a09deffbfb050 | |
| parent | drm/ast: Properly initialize P2A base before using it in ast_init_3rdtx() (diff) | |
| download | linux-42fb1427443b8a72a3c07efa14d53c63d324cba8.tar.xz linux-42fb1427443b8a72a3c07efa14d53c63d324cba8.zip | |
drm/ast: Don't assume DVO enabled means SIL164 on uninitialized chips
It looks like the AST2400 comes up with the DVO enable bit set,
which causes us to incorrectly assume we have a SIL164 regardless
of the value of the scratch registers setup by the BMC firmware.
So let's limit that test to the case where the chip has already
been setup by a BIOS.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/ast/ast_main.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 556d065590cc..48998b2102a5 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -158,16 +158,22 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) /* * VGACRA3 Enhanced Color Mode Register, check if DVO is already * enabled, in that case, assume we have a SIL164 TMDS transmitter + * + * Don't make that assumption if we the chip wasn't enabled and + * is at power-on reset, otherwise we'll incorrectly "detect" a + * SIL164 when there is none. */ - jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); - if (jreg & 0x80) - ast->tx_chip_type = AST_TX_SIL164; + if (!*need_post) { + jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff); + if (jreg & 0x80) + ast->tx_chip_type = AST_TX_SIL164; + } if ((ast->chip == AST2300) || (ast->chip == AST2400)) { /* * On AST2300 and 2400, look the configuration set by the SoC in * the SOC scratch register #1 bits 11:8 (interestingly marked - * as "reserved" in the spec + * as "reserved" in the spec) */ jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff); switch (jreg) { |