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authorAlexander Usyskin <alexander.usyskin@intel.com>2015-01-25 22:45:27 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-02-04 00:48:51 +0100
commit1ab1e79b9fd4b01331490bbe2e630a0fc0b25449 (patch)
treeeb7dbb415225c24256f1afc31d1d3a7671d6aded
parentMerge tag 'extcon-next-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel... (diff)
downloadlinux-1ab1e79b9fd4b01331490bbe2e630a0fc0b25449.tar.xz
linux-1ab1e79b9fd4b01331490bbe2e630a0fc0b25449.zip
mei: mask interrupt set bit on clean reset bit
We should mask interrupt set bit when writing back hcsr value in reset bit clean-up. This is refinement for mei: clean reset bit before reset commit b13a65ef190e488e2761d65bdd2e1fe8a3a125f5 Cc: <stable@vger.kernel.org> #3.10+ Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/misc/mei/hw-me.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 06ff0a2ec960..ccc1b405ca21 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -242,7 +242,7 @@ static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable)
if ((hcsr & H_RST) == H_RST) {
dev_warn(dev->dev, "H_RST is set = 0x%08X", hcsr);
hcsr &= ~H_RST;
- mei_me_reg_write(hw, H_CSR, hcsr);
+ mei_hcsr_set(hw, hcsr);
hcsr = mei_hcsr_read(hw);
}