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| author | Kedareswara rao Appana <appana.durga.rao@xilinx.com> | 2016-05-13 09:03:30 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2016-05-13 11:30:18 +0200 |
| commit | 4ac4e120677481277e092c5f44cb781266e7853e (patch) | |
| tree | 9a67485b0a7089b2c6ef0fc56b58337d5b4b993e | |
| parent | dmaengine: vdma: Add config structure to differentiate dmas (diff) | |
| download | linux-4ac4e120677481277e092c5f44cb781266e7853e.tar.xz linux-4ac4e120677481277e092c5f44cb781266e7853e.zip | |
Documentation: DT: vdma: Add clock support for dmas
This patch updates the binding doc with clock description
for AXI DMA's.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| -rw-r--r-- | Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt index fcc2b6517560..a1f2683c49bf 100644 --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_vdma.txt @@ -21,6 +21,18 @@ Required properties: - dma-channel child node: Should have at least one channel and can have up to two channels per device. This node specifies the properties of each DMA channel (see child node properties below). +- clocks: Input clock specifier. Refer to common clock bindings. +- clock-names: List of input clocks + For VDMA: + Required elements: "s_axi_lite_aclk" + Optional elements: "m_axi_mm2s_aclk" "m_axi_s2mm_aclk", + "m_axis_mm2s_aclk", "s_axis_s2mm_aclk" + For CDMA: + Required elements: "s_axi_lite_aclk", "m_axi_aclk" + FOR AXIDMA: + Required elements: "s_axi_lite_aclk" + Optional elements: "m_axi_mm2s_aclk", "m_axi_s2mm_aclk", + "m_axi_sg_aclk" Required properties for VDMA: - xlnx,num-fstores: Should be the number of framebuffers as configured in h/w. @@ -60,6 +72,9 @@ axi_vdma_0: axivdma@40030000 { xlnx,num-fstores = <0x8>; xlnx,flush-fsync = <0x1>; xlnx,addrwidth = <0x20>; + clocks = <&clk 0>, <&clk 1>, <&clk 2>, <&clk 3>, <&clk 4>; + clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk", + "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"; dma-channel@40030000 { compatible = "xlnx,axi-vdma-mm2s-channel"; interrupts = < 0 54 4 >; |