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author | Guillem Jover <guillem@hadrons.org> | 2010-09-17 17:24:11 +0200 |
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committer | Jean Delvare <khali@linux-fr.org> | 2010-09-17 17:24:11 +0200 |
commit | 96f3640894012be7dd15a384566bfdc18297bc6c (patch) | |
tree | a39f2474004a25dd46b3add0aeb3a1f0429045a3 | |
parent | hwmon: New subsystem maintainers (diff) | |
download | linux-96f3640894012be7dd15a384566bfdc18297bc6c.tar.xz linux-96f3640894012be7dd15a384566bfdc18297bc6c.zip |
hwmon: (f75375s) Shift control mode to the correct bit position
The spec notes that fan0 and fan1 control mode bits are located in bits
7-6 and 5-4 respectively, but the FAN_CTRL_MODE macro was making the
bits shift by 5 instead of by 4.
Signed-off-by: Guillem Jover <guillem@hadrons.org>
Cc: Riku Voipio <riku.voipio@iki.fi>
Cc: stable@kernel.org
Signed-off-by: Jean Delvare <khali@linux-fr.org>
-rw-r--r-- | drivers/hwmon/f75375s.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hwmon/f75375s.c b/drivers/hwmon/f75375s.c index 0f58ecc5334d..e5828c009d91 100644 --- a/drivers/hwmon/f75375s.c +++ b/drivers/hwmon/f75375s.c @@ -79,7 +79,7 @@ enum chips { f75373, f75375 }; #define F75375_REG_PWM2_DROP_DUTY 0x6C #define FAN_CTRL_LINEAR(nr) (4 + nr) -#define FAN_CTRL_MODE(nr) (5 + ((nr) * 2)) +#define FAN_CTRL_MODE(nr) (4 + ((nr) * 2)) /* * Data structures and manipulation thereof |