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authorYanir Lubetkin <yanirx.lubetkin@intel.com>2015-06-10 00:15:57 +0200
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2015-06-26 11:43:44 +0200
commit69cfbc95bdbfa2bd9a82f27dc131b08c48542f19 (patch)
treea9fdcea740fd104bb329495d1f3c0dacb2165717
parente1000e: i219 - fix to enable both ULP and EEE in Sx state (diff)
downloadlinux-69cfbc95bdbfa2bd9a82f27dc131b08c48542f19.tar.xz
linux-69cfbc95bdbfa2bd9a82f27dc131b08c48542f19.zip
e1000e: i219 - increase IPG for speed 10/100 full duplex
In SPT/i219, there were CRC errors in speed 10/100 full duplex. The solution given by the HW team is to increase the IPG from 8 to 0xC Signed-off-by: Yanir Lubetkin <yanirx.lubetkin@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index c5bb1dd8a18e..983f5bf07bc4 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -1400,16 +1400,20 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
if (((hw->mac.type == e1000_pch2lan) ||
(hw->mac.type == e1000_pch_lpt) ||
(hw->mac.type == e1000_pch_spt)) && link) {
- u32 reg;
+ u16 speed, duplex;
- reg = er32(STATUS);
+ e1000e_get_speed_and_duplex_copper(hw, &speed, &duplex);
tipg_reg = er32(TIPG);
tipg_reg &= ~E1000_TIPG_IPGT_MASK;
- if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) {
+ if (duplex == HALF_DUPLEX && speed == SPEED_10) {
tipg_reg |= 0xFF;
/* Reduce Rx latency in analog PHY */
emi_val = 0;
+ } else if (hw->mac.type == e1000_pch_spt &&
+ duplex == FULL_DUPLEX && speed != SPEED_1000) {
+ tipg_reg |= 0xC;
+ emi_val = 1;
} else {
/* Roll back the default values */