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| author | Vojtech Pavlik <vojtech@suse.cz> | 2006-09-26 10:52:28 +0200 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2006-09-26 10:52:28 +0200 |
| commit | 81af4449af9c9b686a4eeeb00112614621655704 (patch) | |
| tree | 52dc5cac0124a87a6a323f415338c31631dbbf20 | |
| parent | [PATCH] x86: i386/x86-64 Add nmi watchdog support for new Intel CPUs (diff) | |
| download | linux-81af4449af9c9b686a4eeeb00112614621655704.tar.xz linux-81af4449af9c9b686a4eeeb00112614621655704.zip | |
[PATCH] Add macros for rdtscp
This patch adds macros for reading tsc via the RDTSCP instruction, as well
as writing the auxilliary MSR read by RDTSCP to msr.h
[AK: changed rdtscp definition for old binutils]
Signed-off-by: Vojtech Pavlik <vojtech@suse.cz>
Signed-off-by: Andi Kleen <ak@suse.de>
| -rw-r--r-- | include/asm-x86_64/msr.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h index 10f8b51cec8b..37e194169fac 100644 --- a/include/asm-x86_64/msr.h +++ b/include/asm-x86_64/msr.h @@ -66,14 +66,25 @@ #define rdtscl(low) \ __asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx") +#define rdtscp(low,high,aux) \ + asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux)) + #define rdtscll(val) do { \ unsigned int __a,__d; \ asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \ (val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \ } while(0) +#define rdtscpll(val, aux) do { \ + unsigned long __a, __d; \ + asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \ + (val) = (__d << 32) | __a; \ +} while (0) + #define write_tsc(val1,val2) wrmsr(0x10, val1, val2) +#define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0) + #define rdpmc(counter,low,high) \ __asm__ __volatile__("rdpmc" \ : "=a" (low), "=d" (high) \ |