diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2014-09-18 23:47:20 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:55 +0100 |
commit | 5561c9e467a91c99ae1d0714e78ad26a2d14c744 (patch) | |
tree | 0ef09c7b450c3cf5eed04b2598ba3ab5376829a1 | |
parent | MIPS: Move GIC to drivers/irqchip/ (diff) | |
download | linux-5561c9e467a91c99ae1d0714e78ad26a2d14c744.tar.xz linux-5561c9e467a91c99ae1d0714e78ad26a2d14c744.zip |
irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacks
There's no need for platforms to have their own GIC irq_ack/irq_eoi
callbacks. irq_ack need only clear the GIC's edge detector on
edge-triggered interrupts and there's no need at all for irq_eoi.
Also get rid of the mask_ack callback since it's not necessary either.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7809/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/gic.h | 2 | ||||
-rw-r--r-- | arch/mips/mti-malta/malta-int.c | 16 | ||||
-rw-r--r-- | arch/mips/mti-sead3/sead3-int.c | 21 | ||||
-rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 11 |
4 files changed, 8 insertions, 42 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 022d83136c5a..1bf7985f9435 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h @@ -376,7 +376,5 @@ extern void gic_bind_eic_interrupt(int irq, int set); extern unsigned int gic_get_timer_pending(void); extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src); extern unsigned int gic_get_int(void); -extern void gic_irq_ack(struct irq_data *d); -extern void gic_finish_irq(struct irq_data *d); extern void gic_platform_init(int irqs, struct irq_chip *irq_controller); #endif /* _ASM_GICREGS_H */ diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 5c3120857987..b60adfd2bae6 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -715,22 +715,6 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup) return retval; } -void gic_irq_ack(struct irq_data *d) -{ - int irq = (d->irq - gic_irq_base); - - GIC_CLR_INTR_MASK(irq); - - if (gic_irq_flags[irq] & GIC_TRIG_EDGE) - GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); -} - -void gic_finish_irq(struct irq_data *d) -{ - /* Enable interrupts. */ - GIC_SET_INTR_MASK(d->irq - gic_irq_base); -} - void __init gic_platform_init(int irqs, struct irq_chip *irq_controller) { int i; diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c index 9d5b5bd3a1d2..03f9865e0464 100644 --- a/arch/mips/mti-sead3/sead3-int.c +++ b/arch/mips/mti-sead3/sead3-int.c @@ -85,27 +85,6 @@ void __init arch_init_irq(void) ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); } -void gic_irq_ack(struct irq_data *d) -{ - GIC_CLR_INTR_MASK(d->irq - gic_irq_base); -} - -void gic_finish_irq(struct irq_data *d) -{ - unsigned int irq = (d->irq - gic_irq_base); - unsigned int i, irq_source; - - /* Clear edge detectors. */ - for (i = 0; i < gic_shared_intr_map[irq].num_shared_intr; i++) { - irq_source = gic_shared_intr_map[irq].intr_list[i]; - if (gic_irq_flags[irq_source] & GIC_TRIG_EDGE) - GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq_source); - } - - /* Enable interrupts. */ - GIC_SET_INTR_MASK(irq); -} - void __init gic_platform_init(int irqs, struct irq_chip *irq_controller) { int i; diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index 582883069ef6..76658660ea4f 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -237,6 +237,13 @@ static void gic_unmask_irq(struct irq_data *d) GIC_SET_INTR_MASK(d->irq - gic_irq_base); } +static void gic_ack_irq(struct irq_data *d) +{ + /* Clear edge detector */ + if (gic_irq_flags[d->irq - gic_irq_base] & GIC_TRIG_EDGE) + GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), d->irq - gic_irq_base); +} + #ifdef CONFIG_SMP static DEFINE_SPINLOCK(gic_lock); @@ -272,11 +279,9 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, static struct irq_chip gic_irq_controller = { .name = "MIPS GIC", - .irq_ack = gic_irq_ack, + .irq_ack = gic_ack_irq, .irq_mask = gic_mask_irq, - .irq_mask_ack = gic_mask_irq, .irq_unmask = gic_unmask_irq, - .irq_eoi = gic_finish_irq, #ifdef CONFIG_SMP .irq_set_affinity = gic_set_affinity, #endif |