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authorCharles Keepax <ckeepax@opensource.wolfsonmicro.com>2012-11-20 06:49:10 +0100
committerSamuel Ortiz <sameo@linux.intel.com>2012-11-20 12:46:45 +0100
commit46b9d13aaec19dfbd5882a999e8ed85fc97a751e (patch)
tree74610131991640b38f23aa38676ff241bd6deed5
parentmfd: arizona: Correctly report when AIF2/AIF1 is underclocked (diff)
downloadlinux-46b9d13aaec19dfbd5882a999e8ed85fc97a751e.tar.xz
linux-46b9d13aaec19dfbd5882a999e8ed85fc97a751e.zip
mfd: arizona: Sync regcache after reset
In the absence of a physical reset line the chip is reset by writing the first register, which is done after the register patch has been applied. This patch synchronises the register cache after the reset to preserve any register changes that had been applied. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
-rw-r--r--drivers/mfd/arizona-core.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 202bf55c3cc9..f4f9bf84bc7b 100644
--- a/drivers/mfd/arizona-core.c
+++ b/drivers/mfd/arizona-core.c
@@ -415,11 +415,19 @@ int __devinit arizona_dev_init(struct arizona *arizona)
/* If we have a /RESET GPIO we'll already be reset */
if (!arizona->pdata.reset) {
+ regcache_mark_dirty(arizona->regmap);
+
ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
if (ret != 0) {
dev_err(dev, "Failed to reset device: %d\n", ret);
goto err_reset;
}
+
+ ret = regcache_sync(arizona->regmap);
+ if (ret != 0) {
+ dev_err(dev, "Failed to sync device: %d\n", ret);
+ goto err_reset;
+ }
}
ret = arizona_wait_for_boot(arizona);