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| author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-04 00:32:39 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-19 04:14:21 +0200 |
| commit | 675055bfb5f99be56a20a6a214439adf23591786 (patch) | |
| tree | 66b710f5f9eada27d296a49174b000a59c7c5090 | |
| parent | [MIPS] Rewrite all the assembler interrupt handlers to C. (diff) | |
| download | linux-675055bfb5f99be56a20a6a214439adf23591786.tar.xz linux-675055bfb5f99be56a20a6a214439adf23591786.zip | |
[MIPS] Use "R" constraint for cache_op.
Gcc might emit an absolute address for the the "m" constraint which
gas unfortunately does not permit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | include/asm-mips/r4kcache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-mips/r4kcache.h b/include/asm-mips/r4kcache.h index 90c374700977..2f2eb95387f6 100644 --- a/include/asm-mips/r4kcache.h +++ b/include/asm-mips/r4kcache.h @@ -37,7 +37,7 @@ " cache %0, %1 \n" \ " .set pop \n" \ : \ - : "i" (op), "m" (*(unsigned char *)(addr))) + : "i" (op), "R" (*(unsigned char *)(addr))) static inline void flush_icache_line_indexed(unsigned long addr) { |