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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-19 14:25:16 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-19 14:25:16 +0100
commit41f3103fcfffff096c34f5267d7c9a26b44d89d3 (patch)
tree011bbbc5d7b5e25f2c49ee3de825086b167bc653
parent[ARM] 5403/1: pxa25x_ep_fifo_flush() *ep->reg_udccs always set to 0 (diff)
downloadlinux-41f3103fcfffff096c34f5267d7c9a26b44d89d3.tar.xz
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[ARM] omap: fix clock reparenting in omap2_clk_set_parent()
When changing the parent of a clock, it is necessary to keep the clock use counts balanced otherwise things the parent state will get corrupted. Since we already disable and re-enable the clock, we might as well use the recursive versions instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-omap2/clock.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index e64549e4e326..ce4d46a4a838 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -746,7 +746,7 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
return -EINVAL;
if (clk->usecount > 0)
- _omap2_clk_disable(clk);
+ omap2_clk_disable(clk);
/* Set new source value (previous dividers if any in effect) */
reg_val = __raw_readl(src_addr) & ~field_mask;
@@ -759,11 +759,11 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
wmb();
}
- if (clk->usecount > 0)
- _omap2_clk_enable(clk);
-
clk->parent = new_parent;
+ if (clk->usecount > 0)
+ omap2_clk_enable(clk);
+
/* CLKSEL clocks follow their parents' rates, divided by a divisor */
clk->rate = new_parent->rate;