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author | Paul Mundt <lethal@linux-sh.org> | 2007-11-10 12:27:03 +0100 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2008-01-28 05:18:44 +0100 |
commit | 256b22ca66987c537064dc25b0b267966189b5ba (patch) | |
tree | 482f095562a3e1614b67de5352f09d4feea673f1 | |
parent | sh: Disable initial cache flush on SH-5. (diff) | |
download | linux-256b22ca66987c537064dc25b0b267966189b5ba.tar.xz linux-256b22ca66987c537064dc25b0b267966189b5ba.zip |
sh: Have SH-5 provide an {en,dis}able_fpu() impl.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/kernel/ptrace_64.c | 8 | ||||
-rw-r--r-- | arch/sh/kernel/traps_64.c | 8 | ||||
-rw-r--r-- | include/asm-sh/processor_64.h | 15 |
3 files changed, 21 insertions, 10 deletions
diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index 8a2d339cf760..14e7d5e5679a 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c @@ -74,9 +74,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr) } if (last_task_used_math == task) { - grab_fpu(); + enable_fpu(); fpsave(&task->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } @@ -110,9 +110,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data) fpinit(&task->thread.fpu.hard); set_stopped_child_used_math(task); } else if (last_task_used_math == task) { - grab_fpu(); + enable_fpu(); fpsave(&task->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = 0; regs->sr |= SR_FD; } diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c index 742ce18b6820..0f4ea3ac3e0b 100644 --- a/arch/sh/kernel/traps_64.c +++ b/arch/sh/kernel/traps_64.c @@ -617,9 +617,9 @@ static int misaligned_fpu_load(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); + enable_fpu(); fpsave(¤t->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } @@ -690,9 +690,9 @@ static int misaligned_fpu_store(struct pt_regs *regs, context switch the registers into memory so they can be indexed by register number. */ if (last_task_used_math == current) { - grab_fpu(); + enable_fpu(); fpsave(¤t->thread.fpu.hard); - release_fpu(); + disable_fpu(); last_task_used_math = NULL; regs->sr |= SR_FD; } diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h index ecd6b403f7db..312fd73fb87e 100644 --- a/include/asm-sh/processor_64.h +++ b/include/asm-sh/processor_64.h @@ -18,6 +18,7 @@ #include <asm/page.h> #include <asm/types.h> #include <asm/cache.h> +#include <asm/ptrace.h> #include <asm/cpu/registers.h> /* @@ -218,7 +219,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); * FPU lazy state save handling. */ -static inline void release_fpu(void) +static inline void disable_fpu(void) { unsigned long long __dummy; @@ -230,7 +231,7 @@ static inline void release_fpu(void) : "r" (SR_FD)); } -static inline void grab_fpu(void) +static inline void enable_fpu(void) { unsigned long long __dummy; @@ -242,6 +243,16 @@ static inline void grab_fpu(void) : "r" (~SR_FD)); } +static inline void release_fpu(struct pt_regs *regs) +{ + regs->sr |= SR_FD; +} + +static inline void grab_fpu(struct pt_regs *regs) +{ + regs->sr &= ~SR_FD; +} + /* Round to nearest, no exceptions on inexact, overflow, underflow, zero-divide, invalid. Configure option for whether to flush denorms to zero, or except if a denorm is encountered. */ |