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authorPeter Griffin <peter.griffin@linaro.org>2015-06-10 16:04:00 +0200
committerMaxime Coquelin <maxime.coquelin@st.com>2015-07-22 11:03:10 +0200
commit36cfc8c14365aa604e5b31e53d56db1299e4008f (patch)
tree006e8e8199f5048f03f3cc0152cafebeb681bef9
parentARM: STi: DT: Add STiH407 family tsin2 pinctrl configuration (diff)
downloadlinux-36cfc8c14365aa604e5b31e53d56db1299e4008f.tar.xz
linux-36cfc8c14365aa604e5b31e53d56db1299e4008f.zip
ARM: STi: DT: Add STiH407 family tsin3 pinctrl configuration
tsin3 channel can only be configured for serial data transfer. On B2120 reference design tsin3 is brought out as TSB on the NIMB slot of the B2004A daughter board. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r--arch/arm/boot/dts/stih407-pinctrl.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index fc6097ca5b15..760f925e1dcc 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -523,6 +523,18 @@
};
};
};
+
+ tsin3 {
+ pinctrl_tsin3_serial: tsin3_serial {
+ st,pins {
+ DATA7 = <&pio14 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+ CLKIN = <&pio14 0 ALT1 IN CLKNOTDATA 0 CLK_A>;
+ VALID = <&pio13 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+ ERROR = <&pio13 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+ PKCLK = <&pio13 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
+ };
+ };
+ };
};
pin-controller-front1 {