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author | Peter Griffin <peter.griffin@linaro.org> | 2015-06-10 16:04:00 +0200 |
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committer | Maxime Coquelin <maxime.coquelin@st.com> | 2015-07-22 11:03:10 +0200 |
commit | e0decdd60a730fe9d5607403ef48a4548d25ff24 (patch) | |
tree | 18f2917e3d60641f4c1d78ab0fd0b3ad1f232e1a | |
parent | ARM: STi: DT: Add STiH407 family tsout0 pinctrl configuration (diff) | |
download | linux-e0decdd60a730fe9d5607403ef48a4548d25ff24.tar.xz linux-e0decdd60a730fe9d5607403ef48a4548d25ff24.zip |
ARM: STi: DT: Add STiH407 family tsout1 pinctrl configuration
tsout1 channel can only be configured for serial data tranfer.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r-- | arch/arm/boot/dts/stih407-pinctrl.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index d2ebb25fa5ca..b52cf4070e53 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -596,6 +596,18 @@ }; }; }; + + tsout1 { + pinctrl_tsout1_serial: tsout1_serial { + st,pins { + DATA7 = <&pio19 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + CLKIN = <&pio19 3 ALT1 OUT NICLK 0 CLK_A>; + VALID = <&pio19 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + ERROR = <&pio19 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + PKCLK = <&pio19 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; + }; + }; + }; }; pin-controller-front1 { |