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authorAntony Pavlov <antonynpavlov@gmail.com>2016-03-17 04:34:08 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-04-03 12:32:09 +0200
commit2b885ea66f4cb15cc3812dc90ddfb3b6b0567561 (patch)
tree61632d0e26ff3e952e368e23ef60e71ade56c329
parentMIPS: traps: Correct the SIGTRAP debug ABI in `do_watch' and `do_trap_or_bp' (diff)
downloadlinux-2b885ea66f4cb15cc3812dc90ddfb3b6b0567561.tar.xz
linux-2b885ea66f4cb15cc3812dc90ddfb3b6b0567561.zip
dt-bindings: clock: qca,ath79-pll: fix copy-paste typos
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Cc: Alban Bedel <albeu@free.fr> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12869/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--Documentation/devicetree/bindings/clock/qca,ath79-pll.txt6
-rw-r--r--arch/mips/boot/dts/qca/ar9132.dtsi2
2 files changed, 4 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
index e0fc2c11dd00..241fb0545b9e 100644
--- a/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
+++ b/Documentation/devicetree/bindings/clock/qca,ath79-pll.txt
@@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller
The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB.
Required Properties:
-- compatible: has to be "qca,<soctype>-cpu-intc" and one of the following
+- compatible: has to be "qca,<soctype>-pll" and one of the following
fallbacks:
- "qca,ar7100-pll"
- "qca,ar7240-pll"
@@ -21,8 +21,8 @@ Optional properties:
Example:
- memory-controller@18050000 {
- compatible = "qca,ar9132-ppl", "qca,ar9130-pll";
+ pll-controller@18050000 {
+ compatible = "qca,ar9132-pll", "qca,ar9130-pll";
reg = <0x18050000 0x20>;
clock-names = "ref";
diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
index 3ad4ba9b12fd..3c2ed9ee5b2f 100644
--- a/arch/mips/boot/dts/qca/ar9132.dtsi
+++ b/arch/mips/boot/dts/qca/ar9132.dtsi
@@ -83,7 +83,7 @@
};
pll: pll-controller@18050000 {
- compatible = "qca,ar9132-ppl",
+ compatible = "qca,ar9132-pll",
"qca,ar9130-pll";
reg = <0x18050000 0x20>;