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| author | Sekhar Nori <nsekhar@ti.com> | 2018-05-07 13:34:57 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-05-16 00:33:52 +0200 |
| commit | a714dceb721407c2a5d2887938f37e34ed00669c (patch) | |
| tree | 8fa1e5b8db61828c25a5d1346abf28854ecfff36 | |
| parent | Linux 4.17-rc1 (diff) | |
| download | linux-a714dceb721407c2a5d2887938f37e34ed00669c.tar.xz linux-a714dceb721407c2a5d2887938f37e34ed00669c.zip | |
clk: davinci: psc-da830: fix USB0 48MHz PHY clock registration
USB0 48MHz PHY clock registration fails on DA830 because the
da8xx-cfgchip clock driver cannot get a reference to USB0
LPSC clock.
The USB0 LPSC needs to be enabled during PHY clock enable. Setup
the clock lookup correctly to fix this.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| -rw-r--r-- | drivers/clk/davinci/psc-da830.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/davinci/psc-da830.c b/drivers/clk/davinci/psc-da830.c index f61abf5632ff..081b039fcb02 100644 --- a/drivers/clk/davinci/psc-da830.c +++ b/drivers/clk/davinci/psc-da830.c @@ -55,7 +55,8 @@ const struct davinci_psc_init_data da830_psc0_init_data = { .psc_init = &da830_psc0_init, }; -LPSC_CLKDEV2(usb0_clkdev, NULL, "musb-da8xx", +LPSC_CLKDEV3(usb0_clkdev, "fck", "da830-usb-phy-clks", + NULL, "musb-da8xx", NULL, "cppi41-dmaengine"); LPSC_CLKDEV1(usb1_clkdev, NULL, "ohci-da8xx"); /* REVISIT: gpio-davinci.c should be modified to drop con_id */ |