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authorLeonard Crestez <leonard.crestez@nxp.com>2019-04-12 16:10:03 +0200
committerStephen Boyd <sboyd@kernel.org>2019-04-12 23:21:43 +0200
commitf89b9e1be7da8bb0aac667a0206a00975cefe6d3 (patch)
treea052db2d577c89547a1188d072fe8eca197e6027
parentclk: mediatek: fix clk-gate flag setting (diff)
downloadlinux-f89b9e1be7da8bb0aac667a0206a00975cefe6d3.tar.xz
linux-f89b9e1be7da8bb0aac667a0206a00975cefe6d3.zip
clk: imx: Fix PLL_1416X not rounding rates
Code which initializes the "clk_init_data.ops" checks pll->rate_table before that field is ever assigned to so it always picks "clk_pll1416x_min_ops". This breaks dynamic rate rounding for features such as cpufreq. Fix by checking pll_clk->rate_table instead, here pll_clk refers to the constant initialization data coming from per-soc clk driver. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Fixes: 8646d4dcc7fb ("clk: imx: Add PLLs driver for imx8mm soc") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
-rw-r--r--drivers/clk/imx/clk-pll14xx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 1acfa3e3cfb4..113d71042199 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -362,7 +362,7 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name,
switch (pll_clk->type) {
case PLL_1416X:
- if (!pll->rate_table)
+ if (!pll_clk->rate_table)
init.ops = &clk_pll1416x_min_ops;
else
init.ops = &clk_pll1416x_ops;