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author | Arnd Bergmann <arnd@arndb.de> | 2011-12-01 13:34:21 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-12-01 13:34:21 +0100 |
commit | 8d685b7f4d9c9882442bf1b492558d5f17b694fa (patch) | |
tree | fcd2cfc985cad3982b5334f3b57054c7279770bc | |
parent | ARM: at91/gpio: fix display of number of irq setuped (diff) | |
parent | msm: platsmp: Mark ioremapped memory as __iomem (diff) | |
download | linux-8d685b7f4d9c9882442bf1b492558d5f17b694fa.tar.xz linux-8d685b7f4d9c9882442bf1b492558d5f17b694fa.zip |
Merge branches 'at91/gpio', 'at91/ioremap', 'drivers/macb-gem-cleanup' and 'msm/misc' into next/cleanup
-rw-r--r-- | arch/arm/Kconfig.debug | 37 | ||||
-rw-r--r-- | arch/arm/mach-msm/Kconfig | 35 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/debug-macro.S | 51 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-7x00.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-7x30.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8960.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x50.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap.h | 12 | ||||
-rw-r--r-- | arch/arm/mach-msm/include/mach/uncompress.h | 39 | ||||
-rw-r--r-- | arch/arm/mach-msm/io.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-msm/platsmp.c | 2 |
12 files changed, 138 insertions, 99 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 0608c0ba94e6..e0d236d7ff73 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -255,6 +255,43 @@ choice their output to the standard serial port on the RealView PB1176 platform. + config DEBUG_MSM_UART1 + bool "Kernel low-level debugging messages via MSM UART1" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the first serial port on MSM devices. + + config DEBUG_MSM_UART2 + bool "Kernel low-level debugging messages via MSM UART2" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the second serial port on MSM devices. + + config DEBUG_MSM_UART3 + bool "Kernel low-level debugging messages via MSM UART3" + depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 + help + Say Y here if you want the debug print routines to direct + their output to the third serial port on MSM devices. + + config DEBUG_MSM8660_UART + bool "Kernel low-level debugging messages via MSM 8660 UART" + depends on ARCH_MSM8X60 + select MSM_HAS_DEBUG_UART_HS + help + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8660 devices. + + config DEBUG_MSM8960_UART + bool "Kernel low-level debugging messages via MSM 8960 UART" + depends on ARCH_MSM8960 + select MSM_HAS_DEBUG_UART_HS + help + Say Y here if you want the debug print routines to direct + their output to the serial port on MSM 8960 devices. + endchoice config EARLY_PRINTK diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index ebde97f5d5f0..000ddf0a4f33 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -13,7 +13,6 @@ config ARCH_MSM7X00A select CPU_V6 select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM7X30 bool "MSM7x30" @@ -25,7 +24,6 @@ config ARCH_MSM7X30 select MSM_GPIOMUX select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_QSD8X50 bool "QSD8X50" @@ -37,7 +35,6 @@ config ARCH_QSD8X50 select MSM_GPIOMUX select GPIO_MSM_V1 select MSM_PROC_COMM - select HAS_MSM_DEBUG_UART_PHYS config ARCH_MSM8X60 bool "MSM8X60" @@ -63,6 +60,9 @@ config ARCH_MSM8960 endchoice +config MSM_HAS_DEBUG_UART_HS + bool + config MSM_SOC_REV_A bool config ARCH_MSM_SCORPIONMP @@ -73,9 +73,6 @@ config ARCH_MSM_ARM11 config ARCH_MSM_SCORPION bool -config HAS_MSM_DEBUG_UART_PHYS - bool - config MSM_VIC bool @@ -152,32 +149,6 @@ config MACH_MSM8960_RUMI3 endmenu -config MSM_DEBUG_UART - int - default 1 if MSM_DEBUG_UART1 - default 2 if MSM_DEBUG_UART2 - default 3 if MSM_DEBUG_UART3 - -if HAS_MSM_DEBUG_UART_PHYS -choice - prompt "Debug UART" - - default MSM_DEBUG_UART_NONE - - config MSM_DEBUG_UART_NONE - bool "None" - - config MSM_DEBUG_UART1 - bool "UART1" - - config MSM_DEBUG_UART2 - bool "UART2" - - config MSM_DEBUG_UART3 - bool "UART3" -endchoice -endif - config MSM_SMD_PKG3 bool diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 2dc73ccddb11..3ffd8668c9a5 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S @@ -1,6 +1,7 @@ -/* arch/arm/mach-msm7200/include/mach/debug-macro.S +/* * * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2011, Code Aurora Forum. All rights reserved. * Author: Brian Swetland <swetland@google.com> * * This software is licensed under the terms of the GNU General Public @@ -14,40 +15,52 @@ * */ - - #include <mach/hardware.h> #include <mach/msm_iomap.h> -#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) .macro addruart, rp, rv, tmp +#ifdef MSM_DEBUG_UART_PHYS ldr \rp, =MSM_DEBUG_UART_PHYS ldr \rv, =MSM_DEBUG_UART_BASE +#endif .endm - .macro senduart,rd,rx + .macro senduart, rd, rx +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + @ Write the 1 character to UARTDM_TF + str \rd, [\rx, #0x70] +#else teq \rx, #0 strne \rd, [\rx, #0x0C] +#endif .endm - .macro waituart,rd,rx + .macro waituart, rd, rx +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + @ check for TX_EMT in UARTDM_SR + ldr \rd, [\rx, #0x08] + tst \rd, #0x08 + bne 1002f + @ wait for TXREADY in UARTDM_ISR +1001: ldr \rd, [\rx, #0x14] + tst \rd, #0x80 + beq 1001b +1002: + @ Clear TX_READY by writing to the UARTDM_CR register + mov \rd, #0x300 + str \rd, [\rx, #0x10] + @ Write 0x1 to NCF register + mov \rd, #0x1 + str \rd, [\rx, #0x40] + @ UARTDM reg. Read to induce delay + ldr \rd, [\rx, #0x08] +#else @ wait for TX_READY 1001: ldr \rd, [\rx, #0x08] tst \rd, #0x04 beq 1001b - .endm -#else - .macro addruart, rp, rv, tmp - mov \rv, #0xff000000 - orr \rv, \rv, #0x00f00000 - .endm - - .macro senduart,rd,rx - .endm - - .macro waituart,rd,rx - .endm #endif + .endm - .macro busyuart,rd,rx + .macro busyuart, rd, rx .endm diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 94fe9fe6feb3..8af46123dab6 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h @@ -78,18 +78,6 @@ #define MSM_UART3_PHYS 0xA9C00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_SDC1_PHYS 0xA0400000 #define MSM_SDC1_SIZE SZ_4K diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 37694442d1bd..198202c267c8 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h @@ -89,18 +89,6 @@ #define MSM_UART3_PHYS 0xACC00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_MDC_BASE IOMEM(0xE0200000) #define MSM_MDC_PHYS 0xAA500000 #define MSM_MDC_SIZE SZ_1M diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h index 3c9d9602a318..800b55767e6b 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h @@ -45,4 +45,9 @@ #define MSM8960_TMR0_PHYS 0x0208A000 #define MSM8960_TMR0_SIZE SZ_4K +#ifdef CONFIG_DEBUG_MSM8960_UART +#define MSM_DEBUG_UART_BASE 0xE1040000 +#define MSM_DEBUG_UART_PHYS 0x16440000 +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d67cd73316f4..0faa894729b7 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -83,18 +83,6 @@ #define MSM_UART3_PHYS 0xA9C00000 #define MSM_UART3_SIZE SZ_4K -#ifdef CONFIG_MSM_DEBUG_UART -#define MSM_DEBUG_UART_BASE 0xE1000000 -#if CONFIG_MSM_DEBUG_UART == 1 -#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS -#elif CONFIG_MSM_DEBUG_UART == 2 -#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS -#elif CONFIG_MSM_DEBUG_UART == 3 -#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS -#endif -#define MSM_DEBUG_UART_SIZE SZ_4K -#endif - #define MSM_MDC_BASE IOMEM(0xE0200000) #define MSM_MDC_PHYS 0xAA500000 #define MSM_MDC_SIZE SZ_1M diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 3b19b8f244b8..54e12caa8d86 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -62,4 +62,9 @@ #define MSM8X60_TMR0_PHYS 0x02040000 #define MSM8X60_TMR0_SIZE SZ_4K +#ifdef CONFIG_DEBUG_MSM8660_UART +#define MSM_DEBUG_UART_BASE 0xE1040000 +#define MSM_DEBUG_UART_PHYS 0x19C40000 +#endif + #endif diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h index 4ded15238b60..90682f4599d3 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -55,6 +55,18 @@ #include "msm_iomap-8960.h" +#define MSM_DEBUG_UART_SIZE SZ_4K +#if defined(CONFIG_DEBUG_MSM_UART1) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS +#elif defined(CONFIG_DEBUG_MSM_UART2) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS +#elif defined(CONFIG_DEBUG_MSM_UART3) +#define MSM_DEBUG_UART_BASE 0xE1000000 +#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS +#endif + /* Virtual addresses shared across all MSM targets. */ #define MSM_CSR_BASE IOMEM(0xE0001000) #define MSM_QGIC_DIST_BASE IOMEM(0xF0000000) diff --git a/arch/arm/mach-msm/include/mach/uncompress.h b/arch/arm/mach-msm/include/mach/uncompress.h index d94292c29d8e..169a84007456 100644 --- a/arch/arm/mach-msm/include/mach/uncompress.h +++ b/arch/arm/mach-msm/include/mach/uncompress.h @@ -1,6 +1,6 @@ -/* arch/arm/mach-msm/include/mach/uncompress.h - * +/* * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2011, Code Aurora Forum. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -14,17 +14,40 @@ */ #ifndef __ASM_ARCH_MSM_UNCOMPRESS_H +#define __ASM_ARCH_MSM_UNCOMPRESS_H + +#include <asm/processor.h> +#include <mach/msm_iomap.h> + +#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)) +#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c)) -#include "hardware.h" -#include "linux/io.h" -#include "mach/msm_iomap.h" +#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))) +#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10))) +#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14))) +#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40))) +#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70))) static void putc(int c) { #if defined(MSM_DEBUG_UART_PHYS) - unsigned base = MSM_DEBUG_UART_PHYS; - while (!(readl(base + 0x08) & 0x04)) ; - writel(c, base + 0x0c); +#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS + /* + * Wait for TX_READY to be set; but skip it if we have a + * TX underrun. + */ + if (UART_DM_SR & 0x08) + while (!(UART_DM_ISR & 0x80)) + cpu_relax(); + + UART_DM_CR = 0x300; + UART_DM_NCHAR = 0x1; + UART_DM_TF = c; +#else + while (!(UART_CSR & 0x04)) + cpu_relax(); + UART_TF = c; +#endif #endif } diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c index 8759ecf7454f..578b04e42deb 100644 --- a/arch/arm/mach-msm/io.c +++ b/arch/arm/mach-msm/io.c @@ -47,7 +47,8 @@ static struct map_desc msm_io_desc[] __initdata = { MSM_CHIP_DEVICE(GPIO1, MSM7X00), MSM_CHIP_DEVICE(GPIO2, MSM7X00), MSM_DEVICE(CLK_CTL), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif #ifdef CONFIG_ARCH_MSM7X30 @@ -84,7 +85,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { MSM_DEVICE(SCPLL), MSM_DEVICE(AD5), MSM_DEVICE(MDC), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif { @@ -109,6 +111,9 @@ static struct map_desc msm8x60_io_desc[] __initdata = { MSM_CHIP_DEVICE(TMR0, MSM8X60), MSM_DEVICE(ACC), MSM_DEVICE(GCC), +#ifdef CONFIG_DEBUG_MSM8660_UART + MSM_DEVICE(DEBUG_UART), +#endif }; void __init msm_map_msm8x60_io(void) @@ -123,6 +128,9 @@ static struct map_desc msm8960_io_desc[] __initdata = { MSM_CHIP_DEVICE(QGIC_CPU, MSM8960), MSM_CHIP_DEVICE(TMR, MSM8960), MSM_CHIP_DEVICE(TMR0, MSM8960), +#ifdef CONFIG_DEBUG_MSM8960_UART + MSM_DEVICE(DEBUG_UART), +#endif }; void __init msm_map_msm8960_io(void) @@ -146,7 +154,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { MSM_DEVICE(SAW), MSM_DEVICE(GCC), MSM_DEVICE(TCSR), -#ifdef CONFIG_MSM_DEBUG_UART +#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \ + defined(CONFIG_DEBUG_MSM_UART3) MSM_DEVICE(DEBUG_UART), #endif { diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index fdec58aaa35c..0b3e357c4c8c 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -79,7 +79,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu) ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), SCM_FLAG_COLDBOOT_CPU1); if (ret == 0) { - void *sc1_base_ptr; + void __iomem *sc1_base_ptr; sc1_base_ptr = ioremap_nocache(0x00902000, SZ_4K*2); if (sc1_base_ptr) { writel(0, sc1_base_ptr + VDD_SC1_ARRAY_CLAMP_GFS_CTL); |