diff options
| author | Nikola Cornij <nikola.cornij@amd.com> | 2019-05-08 20:36:03 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 16:34:12 +0200 |
| commit | 98ce8cc1b47ab74e96e08e7b70dc278104f98f36 (patch) | |
| tree | b9ec68636e76cdb6125d15d9176929cb2c9229c0 | |
| parent | drm/amd/display: Return UPDATE_TYPE_FULL on writeback update (diff) | |
| download | linux-98ce8cc1b47ab74e96e08e7b70dc278104f98f36.tar.xz linux-98ce8cc1b47ab74e96e08e7b70dc278104f98f36.zip | |
drm/amd/display: Enable DSC power-gating for DSC streams
[why]
Currently DSC power gating is disabled by default because the power
transition doesn't happen, causing a crash on some systems
[how]
Fix the lack of power state transition and enable DSC power gating
by default.
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 3 |
2 files changed, 8 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index f788a39a1df1..914071393d1c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -222,6 +222,7 @@ static void dcn20_dsc_pg_control( { uint32_t power_gate = power_on ? 0 : 1; uint32_t pwr_status = power_on ? 0 : 2; + uint32_t org_ip_request_cntl = 0; if (hws->ctx->dc->debug.disable_dsc_power_gate) return; @@ -229,6 +230,10 @@ static void dcn20_dsc_pg_control( if (REG(DOMAIN16_PG_CONFIG) == 0) return; + REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); + if (org_ip_request_cntl == 0) + REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); + switch (dsc_inst) { case 0: /* DSC0 */ REG_UPDATE(DOMAIN16_PG_CONFIG, @@ -282,6 +287,9 @@ static void dcn20_dsc_pg_control( BREAK_TO_DEBUGGER(); break; } + + if (org_ip_request_cntl == 0) + REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); } #endif diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c index f2c2cbf4114b..d726f36c5e38 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c @@ -724,9 +724,6 @@ static const struct dc_debug_options debug_defaults_diags = { .disable_pplib_wm_range = true, .disable_stutter = true, .scl_reset_length10 = true, -#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - .disable_dsc_power_gate = true, -#endif }; void dcn20_dpp_destroy(struct dpp **dpp) |