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authorLee Jones <lee.jones@linaro.org>2013-06-03 14:07:51 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-09-26 11:04:33 +0200
commit9d8910737413415114eb72d7b03f4b5c1f305c75 (patch)
treebbbef0aacb8c8f05d7f83ce0924f813bd74071ee
parentARM: ux500: Add PRCC Peripheral clock node to DBx500 Device Tree (diff)
downloadlinux-9d8910737413415114eb72d7b03f4b5c1f305c75.tar.xz
linux-9d8910737413415114eb72d7b03f4b5c1f305c75.zip
ARM: ux500: Supply the GPIO clocks lookup to the DBX500 DT
Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/ste-dbx5x0.dtsi18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi
index 505404e4d3e4..da188a2078ab 100644
--- a/arch/arm/boot/dts/ste-dbx5x0.dtsi
+++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi
@@ -78,6 +78,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <0>;
+
+ clocks = <&prcc_pclk 1 9>;
};
gpio1: gpio@8012e080 {
@@ -91,6 +93,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <1>;
+
+ clocks = <&prcc_pclk 1 9>;
};
gpio2: gpio@8000e000 {
@@ -104,6 +108,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <2>;
+
+ clocks = <&prcc_pclk 3 8>;
};
gpio3: gpio@8000e080 {
@@ -117,6 +123,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <3>;
+
+ clocks = <&prcc_pclk 3 8>;
};
gpio4: gpio@8000e100 {
@@ -130,6 +138,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <4>;
+
+ clocks = <&prcc_pclk 3 8>;
};
gpio5: gpio@8000e180 {
@@ -143,6 +153,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <5>;
+
+ clocks = <&prcc_pclk 3 8>;
};
gpio6: gpio@8011e000 {
@@ -156,6 +168,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <6>;
+
+ clocks = <&prcc_pclk 2 1>;
};
gpio7: gpio@8011e080 {
@@ -169,6 +183,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <7>;
+
+ clocks = <&prcc_pclk 2 1>;
};
gpio8: gpio@a03fe000 {
@@ -182,6 +198,8 @@
gpio-controller;
#gpio-cells = <2>;
gpio-bank = <8>;
+
+ clocks = <&prcc_pclk 6 1>;
};
pinctrl {