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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2017-05-04 20:19:19 +0200
committerJerome Brunet <jbrunet@baylibre.com>2017-05-29 14:33:19 +0200
commitf40a8ce96ae141f5ec83204471df4902e86a572c (patch)
tree6dd478b3e33d9abea6f9d8ef185d25d5ba9d30f8
parentclk: meson-gxbb: expose UART clocks (diff)
downloadlinux-f40a8ce96ae141f5ec83204471df4902e86a572c.tar.xz
linux-f40a8ce96ae141f5ec83204471df4902e86a572c.zip
clk: meson-gxbb: un-export the CPU clock
The CPU clock defined in the Meson GX clock driver is actually a left-over from the Meson8b clock controller. Un-export the clock so we can remove it from the driver. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
-rw-r--r--drivers/clk/meson/gxbb.h2
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h1
2 files changed, 1 insertions, 2 deletions
diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h
index 16ab5b2707c1..4d04f4a3cd59 100644
--- a/drivers/clk/meson/gxbb.h
+++ b/drivers/clk/meson/gxbb.h
@@ -171,7 +171,7 @@
* to be exposed to client nodes in DT: include/dt-bindings/clock/gxbb-clkc.h
*/
#define CLKID_SYS_PLL 0
-/* CLKID_CPUCLK */
+#define CLKID_CPUCLK 1
/* CLKID_HDMI_PLL */
#define CLKID_FIXED_PLL 3
/* CLKID_FCLK_DIV2 */
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index 98b39c2e79af..e3e9f7919c31 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -5,7 +5,6 @@
#ifndef __GXBB_CLKC_H
#define __GXBB_CLKC_H
-#define CLKID_CPUCLK 1
#define CLKID_HDMI_PLL 2
#define CLKID_FCLK_DIV2 4
#define CLKID_FCLK_DIV3 5