diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-01-29 11:17:23 +0100 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-09 19:43:27 +0100 |
| commit | e50b5ac88d3e1c4cf6f74797be6f13bc9109b037 (patch) | |
| tree | e2dc7f9a53d4a364e61babf951f07ae81c5657bb | |
| parent | ARM: dts: lager: Enable SCIF_CLK frequency and pins (diff) | |
| download | linux-e50b5ac88d3e1c4cf6f74797be6f13bc9109b037.tar.xz linux-e50b5ac88d3e1c4cf6f74797be6f13bc9109b037.zip | |
ARM: dts: marzen: Enable SCIF_CLK frequency and pins
Add and enable the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.
This increases the range and accuracy of supported baud rates.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r8a7779-marzen.dts | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts b/arch/arm/boot/dts/r8a7779-marzen.dts index fe396c8d58db..e111d35d02ae 100644 --- a/arch/arm/boot/dts/r8a7779-marzen.dts +++ b/arch/arm/boot/dts/r8a7779-marzen.dts @@ -165,6 +165,9 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + du_pins: du { du0 { renesas,groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0"; @@ -176,6 +179,11 @@ }; }; + scif_clk_pins: scif_clk { + renesas,groups = "scif_clk_b"; + renesas,function = "scif_clk"; + }; + ethernet_pins: ethernet { intc { renesas,groups = "intc_irq1_b"; @@ -222,6 +230,11 @@ status = "okay"; }; +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; + &sdhi0 { pinctrl-0 = <&sdhi0_pins>; pinctrl-names = "default"; |