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author | Paul Mundt <lethal@linux-sh.org> | 2010-07-02 08:44:09 +0200 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-07-02 08:44:09 +0200 |
commit | 59615ecdb516cf218c3699b02d87d9827dc3e0c7 (patch) | |
tree | 120c63e846caad2ba0f469cd608015e9a776193f | |
parent | dmaengine: initialise DMA engine before MMC (diff) | |
download | linux-59615ecdb516cf218c3699b02d87d9827dc3e0c7.tar.xz linux-59615ecdb516cf218c3699b02d87d9827dc3e0c7.zip |
sh: Provide a global TLB flush for U/I-TLB clear.
This provides a sledgehammer approach for clearing the TLBs, only to be
used in cases where we know we will never want to use the mappings again
and have no interest in preserving state. This also destroys wired
entries.
The primary use for this is when we are either entering or exiting the
kernel completely, in the latter case as a precursor for CPU reset by
MMU.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/include/asm/tlbflush.h | 2 | ||||
-rw-r--r-- | arch/sh/kernel/reboot.c | 4 | ||||
-rw-r--r-- | arch/sh/mm/tlbflush_32.c | 16 | ||||
-rw-r--r-- | arch/sh/mm/tlbflush_64.c | 5 |
4 files changed, 27 insertions, 0 deletions
diff --git a/arch/sh/include/asm/tlbflush.h b/arch/sh/include/asm/tlbflush.h index e0ac97221ae6..0df66f0c7284 100644 --- a/arch/sh/include/asm/tlbflush.h +++ b/arch/sh/include/asm/tlbflush.h @@ -21,6 +21,8 @@ extern void local_flush_tlb_kernel_range(unsigned long start, unsigned long end); extern void local_flush_tlb_one(unsigned long asid, unsigned long page); +extern void __flush_tlb_global(void); + #ifdef CONFIG_SMP extern void flush_tlb_all(void); diff --git a/arch/sh/kernel/reboot.c b/arch/sh/kernel/reboot.c index b1fca66bb92e..ca6a5ca64015 100644 --- a/arch/sh/kernel/reboot.c +++ b/arch/sh/kernel/reboot.c @@ -9,6 +9,7 @@ #include <asm/addrspace.h> #include <asm/reboot.h> #include <asm/system.h> +#include <asm/tlbflush.h> void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); @@ -25,6 +26,9 @@ static void native_machine_restart(char * __unused) { local_irq_disable(); + /* Destroy all of the TLBs in preparation for reset by MMU */ + __flush_tlb_global(); + /* Address error with SR.BL=1 first. */ trigger_address_error(); diff --git a/arch/sh/mm/tlbflush_32.c b/arch/sh/mm/tlbflush_32.c index 3fbe03ce8fe3..a6a20d6de4c0 100644 --- a/arch/sh/mm/tlbflush_32.c +++ b/arch/sh/mm/tlbflush_32.c @@ -119,3 +119,19 @@ void local_flush_tlb_mm(struct mm_struct *mm) local_irq_restore(flags); } } + +void __flush_tlb_global(void) +{ + unsigned long flags; + + local_irq_save(flags); + + /* + * This is the most destructive of the TLB flushing options, + * and will tear down all of the UTLB/ITLB mappings, including + * wired entries. + */ + __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR); + + local_irq_restore(flags); +} diff --git a/arch/sh/mm/tlbflush_64.c b/arch/sh/mm/tlbflush_64.c index 03db41cc1268..7f5810f5dfdc 100644 --- a/arch/sh/mm/tlbflush_64.c +++ b/arch/sh/mm/tlbflush_64.c @@ -455,6 +455,11 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end) flush_tlb_all(); } +void __flush_tlb_global(void) +{ + flush_tlb_all(); +} + void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte) { } |