summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTony Lindgren <tony@atomide.com>2017-08-30 22:25:20 +0200
committerTony Lindgren <tony@atomide.com>2017-09-19 19:26:43 +0200
commit8be8576fcf2d90a8bc679bfb25a4121d0eebe0de (patch)
treef98fcc7d94fd12cae504bc17771784e2bc071414
parentARM: dts: Add missing onewire node for omap4 (diff)
downloadlinux-8be8576fcf2d90a8bc679bfb25a4121d0eebe0de.tar.xz
linux-8be8576fcf2d90a8bc679bfb25a4121d0eebe0de.zip
ARM: dts: Add missing hsi node for omap4
On omap4 we're missing the hsi node with it's related "ti,hwmods" property that the SoC interconnect code needs. Note that this will only show up as a bug with "doesn't have mpu register target base" boot errors when the legacy platform data is removed. Let's also update the binding accrodingly while at it. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Reviewed-by: Sebastian Reichel <sre@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--Documentation/devicetree/bindings/hsi/omap-ssi.txt13
-rw-r--r--arch/arm/boot/dts/omap4.dtsi34
2 files changed, 44 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/hsi/omap-ssi.txt b/Documentation/devicetree/bindings/hsi/omap-ssi.txt
index b8eca3c7810d..955e335e7e56 100644
--- a/Documentation/devicetree/bindings/hsi/omap-ssi.txt
+++ b/Documentation/devicetree/bindings/hsi/omap-ssi.txt
@@ -1,10 +1,12 @@
OMAP SSI controller bindings
-OMAP Synchronous Serial Interface (SSI) controller implements a legacy
-variant of MIPI's High Speed Synchronous Serial Interface (HSI).
+OMAP3's Synchronous Serial Interface (SSI) controller implements a
+legacy variant of MIPI's High Speed Synchronous Serial Interface (HSI),
+while the controller found inside OMAP4 is supposed to be fully compliant
+with the HSI standard.
Required properties:
-- compatible: Should include "ti,omap3-ssi".
+- compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
- reg-names: Contains the values "sys" and "gdd" (in this order).
- reg: Contains a matching register specifier for each entry
in reg-names.
@@ -27,6 +29,7 @@ Each port is represented as a sub-node of the ti,omap3-ssi device.
Required Port sub-node properties:
- compatible: Should be set to the following value
ti,omap3-ssi-port (applicable to OMAP34xx devices)
+ ti,omap4-hsi-port (applicable to OMAP44xx devices)
- reg-names: Contains the values "tx" and "rx" (in this order).
- reg: Contains a matching register specifier for each entry
in reg-names.
@@ -38,6 +41,10 @@ Required Port sub-node properties:
property. If it's missing the port will not be
enabled.
+Optional properties:
+- ti,hwmods: Shall contain TI interconnect module name if needed
+ by the SoC
+
Example for Nokia N900:
ssi-controller@48058000 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 69d129b420e0..a3c4d3541e3d 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -624,6 +624,40 @@
dma-names = "tx", "rx";
};
+ hsi: hsi@4a058000 {
+ compatible = "ti,omap4-hsi";
+ reg = <0x4a058000 0x4000>,
+ <0x4a05c000 0x1000>;
+ reg-names = "sys", "gdd";
+ ti,hwmods = "hsi";
+
+ clocks = <&hsi_fck>;
+ clock-names = "hsi_fck";
+
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gdd_mpu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x4a058000 0x4000>;
+
+ hsi_port1: hsi-port@2000 {
+ compatible = "ti,omap4-hsi-port";
+ reg = <0x2000 0x800>,
+ <0x2800 0x800>;
+ reg-names = "tx", "rx";
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ hsi_port2: hsi-port@3000 {
+ compatible = "ti,omap4-hsi-port";
+ reg = <0x3000 0x800>,
+ <0x3800 0x800>;
+ reg-names = "tx", "rx";
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
mmu_dsp: mmu@4a066000 {
compatible = "ti,omap4-iommu";
reg = <0x4a066000 0x100>;