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authorHerbert Xu <herbert@gondor.apana.org.au>2013-02-26 10:52:15 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2013-02-26 10:52:15 +0100
commitca81a1a1b8d79dd6706c9463a81e9491e940ca2b (patch)
tree49ec9e7bae1bf3dcdbdf664bb571686508601cc9
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 (diff)
downloadlinux-ca81a1a1b8d79dd6706c9463a81e9491e940ca2b.tar.xz
linux-ca81a1a1b8d79dd6706c9463a81e9491e940ca2b.zip
crypto: crc32c - Kill pointless CRYPTO_CRC32C_X86_64 option
This bool option can never be set to anything other than y. So let's just kill it. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r--arch/x86/crypto/Makefile2
-rw-r--r--crypto/Kconfig10
2 files changed, 1 insertions, 11 deletions
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index 63947a8f9f0f..ca96761a22e4 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -52,5 +52,5 @@ aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o fpu.o
ghash-clmulni-intel-y := ghash-clmulni-intel_asm.o ghash-clmulni-intel_glue.o
sha1-ssse3-y := sha1_ssse3_asm.o sha1_ssse3_glue.o
crc32c-intel-y := crc32c-intel_glue.o
-crc32c-intel-$(CONFIG_CRYPTO_CRC32C_X86_64) += crc32c-pcl-intel-asm_64.o
+crc32c-intel-$(CONFIG_64BIT) += crc32c-pcl-intel-asm_64.o
crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o
diff --git a/crypto/Kconfig b/crypto/Kconfig
index 05c0ce52f96d..aed52b2e4a55 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -322,19 +322,9 @@ config CRYPTO_CRC32C
by iSCSI for header and data digests and by others.
See Castagnoli93. Module will be crc32c.
-config CRYPTO_CRC32C_X86_64
- bool
- depends on X86 && 64BIT
- select CRYPTO_HASH
- help
- In Intel processor with SSE4.2 supported, the processor will
- support CRC32C calculation using hardware accelerated CRC32
- instruction optimized with PCLMULQDQ instruction when available.
-
config CRYPTO_CRC32C_INTEL
tristate "CRC32c INTEL hardware acceleration"
depends on X86
- select CRYPTO_CRC32C_X86_64 if 64BIT
select CRYPTO_HASH
help
In Intel processor with SSE4.2 supported, the processor will