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authorWenyou Yang <wenyou.yang@atmel.com>2014-12-11 08:31:09 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2015-01-12 15:50:23 +0100
commitb8659752c37ec157ee254cff443b1c9d523aea22 (patch)
tree10e08184637cd8299cd99fae3c386810bd22459d
parentARM: at91/dt: sam9263: Add missing clocks to lcdc node (diff)
downloadlinux-b8659752c37ec157ee254cff443b1c9d523aea22.tar.xz
linux-b8659752c37ec157ee254cff443b1c9d523aea22.zip
ARM: at91: board-dt-sama5: add phy_fixup to override NAND_Tree
Appearance: On some SAMA5D4EK boards, after power up, the Eth1 doesn't work. Reason: The PIOE2 pin is connected to the NAND_Tree# of KSZ8081, But it outputs LOW during the reset period, which cause the NAND_Tree# enabled. Add phy_fixup() to disable NAND_Tree by overriding the Operation Mode Strap Override register(i.e. Register 16h) to clear the NAND_Tree bit. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
-rw-r--r--arch/arm/mach-at91/board-dt-sama5.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c
index 8fb9ef5333f1..97f7367d32b8 100644
--- a/arch/arm/mach-at91/board-dt-sama5.c
+++ b/arch/arm/mach-at91/board-dt-sama5.c
@@ -17,6 +17,7 @@
#include <linux/of_platform.h>
#include <linux/phy.h>
#include <linux/clk-provider.h>
+#include <linux/phy.h>
#include <asm/setup.h>
#include <asm/irq.h>
@@ -26,8 +27,25 @@
#include "generic.h"
+static int ksz8081_phy_fixup(struct phy_device *phy)
+{
+ int value;
+
+ value = phy_read(phy, 0x16);
+ value &= ~0x20;
+ phy_write(phy, 0x16, value);
+
+ return 0;
+}
+
static void __init sama5_dt_device_init(void)
{
+ if (of_machine_is_compatible("atmel,sama5d4ek") &&
+ IS_ENABLED(CONFIG_PHYLIB)) {
+ phy_register_fixup_for_id("fc028000.etherne:00",
+ ksz8081_phy_fixup);
+ }
+
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}