diff options
| author | Andrew Bresticker <abrestic@chromium.org> | 2014-10-20 21:03:49 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:57 +0100 |
| commit | 387904ff84caeeff5aa5aad43aef4d0e5ce4bb24 (patch) | |
| tree | 781cc604660fd8f0ac99e8e5fda26aee13691385 | |
| parent | MIPS: Malta: Use gic_read_count() to read GIC timer (diff) | |
| download | linux-387904ff84caeeff5aa5aad43aef4d0e5ce4bb24.tar.xz linux-387904ff84caeeff5aa5aad43aef4d0e5ce4bb24.zip | |
irqchip: mips-gic: Export function to read counter width
Export the function gic_get_count_width to read the width of
the GIC global counter from GIC_SH_CONFIG. Update the GIC
clocksource driver to use this new function.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8124/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/gic.h | 1 | ||||
| -rw-r--r-- | arch/mips/kernel/csrc-gic.c | 9 | ||||
| -rw-r--r-- | drivers/irqchip/irq-mips-gic.c | 11 |
3 files changed, 13 insertions, 8 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 727b7bf903a8..c88e1fa22365 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h @@ -370,6 +370,7 @@ extern void gic_init(unsigned long gic_base_addr, unsigned int irqbase); extern void gic_clocksource_init(unsigned int); extern cycle_t gic_read_count(void); +extern unsigned int gic_get_count_width(void); extern cycle_t gic_read_compare(void); extern void gic_write_compare(cycle_t cnt); extern void gic_write_cpu_compare(cycle_t cnt, int cpu); diff --git a/arch/mips/kernel/csrc-gic.c b/arch/mips/kernel/csrc-gic.c index e02620901117..ab615c6c51a5 100644 --- a/arch/mips/kernel/csrc-gic.c +++ b/arch/mips/kernel/csrc-gic.c @@ -23,15 +23,8 @@ static struct clocksource gic_clocksource = { void __init gic_clocksource_init(unsigned int frequency) { - unsigned int config, bits; - - /* Calculate the clocksource mask. */ - GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), config); - bits = 32 + ((config & GIC_SH_CONFIG_COUNTBITS_MSK) >> - (GIC_SH_CONFIG_COUNTBITS_SHF - 2)); - /* Set clocksource mask. */ - gic_clocksource.mask = CLOCKSOURCE_MASK(bits); + gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width()); /* Calculate a somewhat reasonable rating value. */ gic_clocksource.rating = 200 + frequency / 10000000; diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c index e49a39a8c853..b5fad6377736 100644 --- a/drivers/irqchip/irq-mips-gic.c +++ b/drivers/irqchip/irq-mips-gic.c @@ -63,6 +63,17 @@ cycle_t gic_read_count(void) return (((cycle_t) hi) << 32) + lo; } +unsigned int gic_get_count_width(void) +{ + unsigned int bits, config; + + GICREAD(GIC_REG(SHARED, GIC_SH_CONFIG), config); + bits = 32 + 4 * ((config & GIC_SH_CONFIG_COUNTBITS_MSK) >> + GIC_SH_CONFIG_COUNTBITS_SHF); + + return bits; +} + void gic_write_compare(cycle_t cnt) { GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_HI), |