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authorDave Jiang <dave.jiang@intel.com>2012-09-06 01:35:44 +0200
committerJames Bottomley <JBottomley@Parallels.com>2012-09-24 10:11:04 +0200
commit44ef2bf72df34ef2628dc3475b4507ab984d6744 (patch)
tree39181c92c6f2bd9d9dffa4dac9a287e16280307c
parent[SCSI] isci: Allow SSP tasks into the task management path. (diff)
downloadlinux-44ef2bf72df34ef2628dc3475b4507ab984d6744.tar.xz
linux-44ef2bf72df34ef2628dc3475b4507ab984d6744.zip
[SCSI] isci: Fix interrupt coalescing assumption of active TCs
We always assign a dummy task context to a port in order to address a silicon issue. We have 4 ports per controller. So when idle, there are always exactly 4 TCs "active". The adaptive interrupt coalescing code uses number of active TCs to figure out the coalescing values. However, we never hit "0" TCs because of the 4 dummy TCs. Putting in fix so that we calculate this correctly. Reported-by: Dan Melnic <dan@seamicro.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
-rw-r--r--drivers/scsi/isci/host.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/scsi/isci/host.c b/drivers/scsi/isci/host.c
index d4daa0f24595..ab026a50ace3 100644
--- a/drivers/scsi/isci/host.c
+++ b/drivers/scsi/isci/host.c
@@ -1122,10 +1122,16 @@ void isci_host_completion_routine(unsigned long data)
sci_controller_completion_handler(ihost);
spin_unlock_irq(&ihost->scic_lock);
- /* the coalesence timeout doubles at each encoding step, so
+ /*
+ * we subtract SCI_MAX_PORTS to account for the number of dummy TCs
+ * issued for hardware issue workaround
+ */
+ active = isci_tci_active(ihost) - SCI_MAX_PORTS;
+
+ /*
+ * the coalesence timeout doubles at each encoding step, so
* update it based on the ilog2 value of the outstanding requests
*/
- active = isci_tci_active(ihost);
writel(SMU_ICC_GEN_VAL(NUMBER, active) |
SMU_ICC_GEN_VAL(TIMER, ISCI_COALESCE_BASE + ilog2(active)),
&ihost->smu_registers->interrupt_coalesce_control);