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| author | David Daney <ddaney@caviumnetworks.com> | 2008-12-17 22:28:39 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-12-22 09:54:47 +0100 |
| commit | ed2b03ed3cec2a4719d04ef208319f9de6a4258a (patch) | |
| tree | 302f49c0e98a736a5949a92538bce999fb5bc41a | |
| parent | MIPS: Fix preprocessor warnings flaged by GCC 4.4 (diff) | |
| download | linux-ed2b03ed3cec2a4719d04ef208319f9de6a4258a.tar.xz linux-ed2b03ed3cec2a4719d04ef208319f9de6a4258a.zip | |
MIPS: MIPS64R2: Fix buggy __arch_swab64
The way the code is written it was assuming dshd has the function of a
hypothetical dshw instruction ...
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/byteorder.h | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h index 2988d29a0867..33790b9e0cc0 100644 --- a/arch/mips/include/asm/byteorder.h +++ b/arch/mips/include/asm/byteorder.h @@ -50,9 +50,8 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) static inline __attribute_const__ __u64 __arch_swab64(__u64 x) { __asm__( - " dsbh %0, %1 \n" - " dshd %0, %0 \n" - " drotr %0, %0, 32 \n" + " dsbh %0, %1\n" + " dshd %0, %0" : "=r" (x) : "r" (x)); |