diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2012-08-16 20:15:22 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-10-11 11:04:35 +0200 |
| commit | f59a2d22a05272034e856b7a2dd7a3ab7864a2ae (patch) | |
| tree | 5111649972d2ea819f9f3e17096d263485c858c5 | |
| parent | MIPS: perf: Add perf functionality for BMIPS5000 (diff) | |
| download | linux-f59a2d22a05272034e856b7a2dd7a3ab7864a2ae.tar.xz linux-f59a2d22a05272034e856b7a2dd7a3ab7864a2ae.zip | |
MIPS: Optimize pgd_init and pmd_init
On a dual issue processor GCC generates code that saves a couple of
clock cycles per loop if we rearrange things slightly. Checking for
p != end saves a SLTU per loop, moving the increment to the middle can
let it dual issue on multi-issue processors.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4249/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/mm/pgtable-64.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/mips/mm/pgtable-64.c b/arch/mips/mm/pgtable-64.c index cda4e300eb0a..25407794edb4 100644 --- a/arch/mips/mm/pgtable-64.c +++ b/arch/mips/mm/pgtable-64.c @@ -26,17 +26,17 @@ void pgd_init(unsigned long page) p = (unsigned long *) page; end = p + PTRS_PER_PGD; - while (p < end) { + do { p[0] = entry; p[1] = entry; p[2] = entry; p[3] = entry; p[4] = entry; - p[5] = entry; - p[6] = entry; - p[7] = entry; p += 8; - } + p[-3] = entry; + p[-2] = entry; + p[-1] = entry; + } while (p != end); } #ifndef __PAGETABLE_PMD_FOLDED @@ -47,17 +47,17 @@ void pmd_init(unsigned long addr, unsigned long pagetable) p = (unsigned long *) addr; end = p + PTRS_PER_PMD; - while (p < end) { + do { p[0] = pagetable; p[1] = pagetable; p[2] = pagetable; p[3] = pagetable; p[4] = pagetable; - p[5] = pagetable; - p[6] = pagetable; - p[7] = pagetable; p += 8; - } + p[-3] = pagetable; + p[-2] = pagetable; + p[-1] = pagetable; + } while (p != end); } #endif |