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| author | Anson Huang <Anson.Huang@nxp.com> | 2020-05-09 10:17:50 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-05-20 03:31:41 +0200 |
| commit | d0955f66494100d3109c36a3244cc7e374e3a4af (patch) | |
| tree | 31163ac2d7c34ac9af90df2ee85a56389d6578a3 | |
| parent | arm64: dts: imx8m: assign clocks for A53 (diff) | |
| download | linux-d0955f66494100d3109c36a3244cc7e374e3a4af.tar.xz linux-d0955f66494100d3109c36a3244cc7e374e3a4af.zip | |
arm64: dts: imx8mq: Add src node interrupts
Interrupts is a required property according to SRC binding, add
it for SRC node.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index e72114465223..005edd0eb7ab 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -607,6 +607,7 @@ src: reset-controller@30390000 { compatible = "fsl,imx8mq-src", "syscon"; reg = <0x30390000 0x10000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; |