diff options
| author | Julien Thierry <julien.thierry@arm.com> | 2019-06-11 11:38:06 +0200 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-06-21 12:19:12 +0200 |
| commit | 9034f6251572a4744597c51dea5ab73a55f2b938 (patch) | |
| tree | bf14c5e2be85090de9a5239f248aa9c51de495dd | |
| parent | arm64/mm: Correct the cache line size warning with non coherent device (diff) | |
| download | linux-9034f6251572a4744597c51dea5ab73a55f2b938.tar.xz linux-9034f6251572a4744597c51dea5ab73a55f2b938.zip | |
arm64: Do not enable IRQs for ct_user_exit
For el0_dbg and el0_error, DAIF bits get explicitly cleared before
calling ct_user_exit.
When context tracking is disabled, DAIF gets set (almost) immediately
after. When context tracking is enabled, among the first things done
is disabling IRQs.
What is actually needed is:
- PSR.D = 0 so the system can be debugged (should be already the case)
- PSR.A = 0 so async error can be handled during context tracking
Do not clear PSR.I in those two locations.
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: James Morse <james.morse@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | arch/arm64/kernel/entry.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index cd0c7af8e4a8..89ab6bd896c4 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -870,7 +870,7 @@ el0_dbg: mov x1, x25 mov x2, sp bl do_debug_exception - enable_daif + enable_da_f ct_user_exit b ret_to_user el0_inv: @@ -922,7 +922,7 @@ el0_error_naked: enable_dbg mov x0, sp bl do_serror - enable_daif + enable_da_f ct_user_exit b ret_to_user ENDPROC(el0_error) |