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| author | Rashmi A <rashmi.a@intel.com> | 2021-08-29 20:24:41 +0200 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2021-10-12 10:21:17 +0200 |
| commit | ab991c05c42853f0b6110022db9bf30fcc6323dd (patch) | |
| tree | d5542898312bbffd8d5cc6f2ae9bde527da62af5 | |
| parent | mmc: omap_hsmmc: Make use of the helper macro SET_RUNTIME_PM_OPS() (diff) | |
| download | linux-ab991c05c42853f0b6110022db9bf30fcc6323dd.tar.xz linux-ab991c05c42853f0b6110022db9bf30fcc6323dd.zip | |
dt-bindings: mmc: Add bindings for Intel Thunder Bay SoC
Add documentation for Arasan SDHCI controller in Thunder Bay SOC.
Signed-off-by: Rashmi A <rashmi.a@intel.com>
Link: https://lore.kernel.org/r/20210829182443.30802-3-rashmi.a@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml index 37a5fe7b26dc..23abb7e8b9d8 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml @@ -88,6 +88,12 @@ properties: description: For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - items: + - const: intel,thunderbay-sdhci-5.1 # Intel Thunder Bay eMMC PHY + - const: arasan,sdhci-5.1 + description: + For this device it is strongly suggested to include + clock-output-names and '#clock-cells'. reg: maxItems: 1 @@ -301,3 +307,22 @@ examples: <&scmi_clk KEEM_BAY_PSS_SD0>; arasan,soc-ctl-syscon = <&sd0_phy_syscon>; }; + + - | + #define EMMC_XIN_CLK + #define EMMC_AXI_CLK + #define TBH_PSS_EMMC_RST_N + mmc@80420000 { + compatible = "intel,thunderbay-sdhci-5.1", "arasan,sdhci-5.1"; + interrupts = <GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x80420000 0x400>; + clocks = <&scmi_clk EMMC_XIN_CLK>, + <&scmi_clk EMMC_AXI_CLK>; + clock-names = "clk_xin", "clk_ahb"; + phys = <&emmc_phy>; + phy-names = "phy_arasan"; + assigned-clocks = <&scmi_clk EMMC_XIN_CLK>; + clock-output-names = "emmc_cardclock"; + resets = <&rst_pss1 TBH_PSS_EMMC_RST_N>; + #clock-cells = <0x0>; + }; |