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authorJim Cromie <jim.cromie@gmail.com>2006-06-27 11:54:18 +0200
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-28 02:32:42 +0200
commitfe3a168a2ce1c93837cdf8fe27a3e67795155f90 (patch)
tree798eaa66b5e95756e800132602ace5f5c00aa3b0
parent[PATCH] chardev: GPIO for SCx200 & PC-8736x: refactor scx200_probe to better ... (diff)
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linux-fe3a168a2ce1c93837cdf8fe27a3e67795155f90.zip
[PATCH] chardev: GPIO for SCx200 & PC-8736x: add gpio-ops vtable
Abstract the gpio operations into a new nsc_gpio_ops vtable. Signed-off-by: Jim Cromie <jim.cromie@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--drivers/char/scx200_gpio.c13
-rw-r--r--include/linux/nsc_gpio.h33
2 files changed, 46 insertions, 0 deletions
diff --git a/drivers/char/scx200_gpio.c b/drivers/char/scx200_gpio.c
index a1a56c5c8a84..f9994ed01816 100644
--- a/drivers/char/scx200_gpio.c
+++ b/drivers/char/scx200_gpio.c
@@ -20,6 +20,7 @@
#include <linux/cdev.h>
#include <linux/scx200_gpio.h>
+#include <linux/nsc_gpio.h>
#define NAME "scx200_gpio"
#define DEVNAME NAME
@@ -36,6 +37,18 @@ MODULE_PARM_DESC(major, "Major device number");
extern void scx200_gpio_dump(unsigned index);
+struct nsc_gpio_ops scx200_access = {
+ .owner = THIS_MODULE,
+ .gpio_config = scx200_gpio_configure,
+ .gpio_dump = scx200_gpio_dump,
+ .gpio_get = scx200_gpio_get,
+ .gpio_set = scx200_gpio_set,
+ .gpio_set_high = scx200_gpio_set_high,
+ .gpio_set_low = scx200_gpio_set_low,
+ .gpio_change = scx200_gpio_change,
+ .gpio_current = scx200_gpio_current
+};
+
static ssize_t scx200_gpio_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
diff --git a/include/linux/nsc_gpio.h b/include/linux/nsc_gpio.h
new file mode 100644
index 000000000000..3ad8ae9dcb5a
--- /dev/null
+++ b/include/linux/nsc_gpio.h
@@ -0,0 +1,33 @@
+/**
+ nsc_gpio.c
+
+ National Semiconductor GPIO common access methods.
+
+ struct nsc_gpio_ops abstracts the low-level access
+ operations for the GPIO units on 2 NSC chip families; the GEODE
+ integrated CPU, and the PC-8736[03456] integrated PC-peripheral
+ chips.
+
+ The GPIO units on these chips have the same pin architecture, but
+ the access methods differ. Thus, scx200_gpio and pc8736x_gpio
+ implement their own versions of these routines; and use the common
+ file-operations routines implemented in nsc_gpio module.
+
+ Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com>
+
+ NB: this work was tested on the Geode SC-1100 and PC-87366 chips.
+ NSC sold the GEODE line to AMD, and the PC-8736x line to Winbond.
+*/
+
+struct nsc_gpio_ops {
+ struct module* owner;
+ u32 (*gpio_config) (unsigned iminor, u32 mask, u32 bits);
+ void (*gpio_dump) (unsigned iminor);
+ int (*gpio_get) (unsigned iminor);
+ void (*gpio_set) (unsigned iminor, int state);
+ void (*gpio_set_high)(unsigned iminor);
+ void (*gpio_set_low) (unsigned iminor);
+ void (*gpio_change) (unsigned iminor);
+ int (*gpio_current) (unsigned iminor);
+};
+