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| author | Howard Chen <ibanezchen@gmail.com> | 2014-11-14 06:14:52 +0100 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2014-11-14 13:50:46 +0100 |
| commit | 4542172e8d7da0733ba50ead5ec16d0998903b2d (patch) | |
| tree | 2465568c563fdacfe572e6c23176df525f16cef9 | |
| parent | dt-bindings: add more chips in documentation for Mediatek SoC (diff) | |
| download | linux-4542172e8d7da0733ba50ead5ec16d0998903b2d.tar.xz linux-4542172e8d7da0733ba50ead5ec16d0998903b2d.zip | |
ARM: mediatek: Add basic support for mt6592
* A dtsi for boards based on Mediatek MT6592 SoCs
* Compatible string in arch/arm/mach-mediatek/mediatek.c
Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| -rw-r--r-- | arch/arm/boot/dts/mt6592.dtsi | 98 | ||||
| -rw-r--r-- | arch/arm/mach-mediatek/mediatek.c | 1 |
2 files changed, 99 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi new file mode 100644 index 000000000000..31e5a0979d78 --- /dev/null +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Howard Chen <ibanezchen@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton.dtsi" + +/ { + compatible = "mediatek,mt6592"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + }; + cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x4>; + }; + cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x5>; + }; + cpu@6 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x6>; + }; + cpu@7 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x7>; + }; + }; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + + timer: timer@10008000 { + compatible = "mediatek,mt6577-timer"; + reg = <0x10008000 0x80>; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a7-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10211000 0x1000>, + <0x10212000 0x1000>; + }; + +}; + diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c index 48051a205414..a9549005097e 100644 --- a/arch/arm/mach-mediatek/mediatek.c +++ b/arch/arm/mach-mediatek/mediatek.c @@ -19,6 +19,7 @@ static const char * const mediatek_board_dt_compat[] = { "mediatek,mt6589", + "mediatek,mt6592", "mediatek,mt8127", "mediatek,mt8135", NULL, |