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authorLinus Walleij <linus.walleij@linaro.org>2014-10-10 15:11:31 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-10-22 13:49:12 +0200
commit7f9ac7dafe1dd99f8b920a40d03f8c231e4da426 (patch)
tree5ffbc3fb8d8abeca00e3617495f41066a9d99201
parentARM: realview: add PL022 SSP/SPI block to PB1176 DTS (diff)
downloadlinux-7f9ac7dafe1dd99f8b920a40d03f8c231e4da426.tar.xz
linux-7f9ac7dafe1dd99f8b920a40d03f8c231e4da426.zip
ARM: realview: add FPGA UART4 to PB1176 DTS
This adds the UART4 found on the FPGA to the PB1176 DTS file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/arm-realview-pb1176.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts
index 313a71756a18..ac4c1c850db2 100644
--- a/arch/arm/boot/dts/arm-realview-pb1176.dts
+++ b/arch/arm/boot/dts/arm-realview-pb1176.dts
@@ -35,6 +35,7 @@
serial1 = &pb1176_serial1;
serial2 = &pb1176_serial2;
serial3 = &pb1176_serial3;
+ serial4 = &fpga_serial;
};
memory {
@@ -288,6 +289,15 @@
clock-names = "apb_pclk";
};
+ fpga_serial: serial@10009000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x10009000 0x1000>;
+ interrupt-parent = <&intc_fpga1176>;
+ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uartclk>, <&pclk>;
+ clock-names = "uartclk", "apb_pclk";
+ };
+
/* This GIC on the board is cascaded off the DevChip GIC */
intc_fpga1176: interrupt-controller@10040000 {
compatible = "arm,arm1176jzf-devchip-gic", "arm,arm11mp-gic";
@@ -334,5 +344,7 @@
clocks = <&pclk>;
clock-names = "apb_pclk";
};
+
+
};
};